Lines Matching refs:dev_index

692 static unsigned long exynos4_get_uart_clk(int dev_index)  in exynos4_get_uart_clk()  argument
710 sel = (sel >> (dev_index << 2)) & 0xf; in exynos4_get_uart_clk()
731 ratio = (ratio >> (dev_index << 2)) & 0xf; in exynos4_get_uart_clk()
739 static unsigned long exynos4x12_get_uart_clk(int dev_index) in exynos4x12_get_uart_clk() argument
756 sel = (sel >> (dev_index << 2)) & 0xf; in exynos4x12_get_uart_clk()
776 ratio = (ratio >> (dev_index << 2)) & 0xf; in exynos4x12_get_uart_clk()
783 static unsigned long exynos4_get_mmc_clk(int dev_index) in exynos4_get_mmc_clk() argument
792 sel = (sel >> (dev_index << 2)) & 0xf; in exynos4_get_mmc_clk()
803 switch (dev_index) { in exynos4_get_mmc_clk()
822 if (dev_index == 1 || dev_index == 3) in exynos4_get_mmc_clk()
833 static void exynos4_set_mmc_clk(int dev_index, unsigned int div) in exynos4_set_mmc_clk() argument
847 if (dev_index < 2) { in exynos4_set_mmc_clk()
849 clear_bit = MASK_PRE_RATIO(dev_index); in exynos4_set_mmc_clk()
850 set_bit = SET_PRE_RATIO(dev_index, div); in exynos4_set_mmc_clk()
851 } else if (dev_index == 4) { in exynos4_set_mmc_clk()
853 dev_index -= 4; in exynos4_set_mmc_clk()
855 clear_bit = MASK_RATIO(dev_index); in exynos4_set_mmc_clk()
856 set_bit = SET_RATIO(dev_index, div); in exynos4_set_mmc_clk()
859 dev_index -= 2; in exynos4_set_mmc_clk()
860 clear_bit = MASK_PRE_RATIO(dev_index); in exynos4_set_mmc_clk()
861 set_bit = SET_PRE_RATIO(dev_index, div); in exynos4_set_mmc_clk()
868 static void exynos5_set_mmc_clk(int dev_index, unsigned int div) in exynos5_set_mmc_clk() argument
880 if (dev_index < 2) { in exynos5_set_mmc_clk()
884 dev_index -= 2; in exynos5_set_mmc_clk()
887 clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8), in exynos5_set_mmc_clk()
888 (div & 0xff) << ((dev_index << 4) + 8)); in exynos5_set_mmc_clk()
892 static void exynos5420_set_mmc_clk(int dev_index, unsigned int div) in exynos5420_set_mmc_clk() argument
906 shift = dev_index * 10; in exynos5420_set_mmc_clk()
1639 unsigned long get_uart_clk(int dev_index) in get_uart_clk() argument
1643 switch (dev_index) { in get_uart_clk()
1657 debug("%s: invalid UART index %d", __func__, dev_index); in get_uart_clk()
1665 return exynos4x12_get_uart_clk(dev_index); in get_uart_clk()
1666 return exynos4_get_uart_clk(dev_index); in get_uart_clk()
1672 unsigned long get_mmc_clk(int dev_index) in get_mmc_clk() argument
1677 return exynos4_get_mmc_clk(dev_index); in get_mmc_clk()
1679 switch (dev_index) { in get_mmc_clk()
1693 debug("%s: invalid MMC index %d", __func__, dev_index); in get_mmc_clk()
1700 void set_mmc_clk(int dev_index, unsigned int div) in set_mmc_clk() argument
1708 exynos5420_set_mmc_clk(dev_index, div); in set_mmc_clk()
1710 exynos5_set_mmc_clk(dev_index, div); in set_mmc_clk()
1712 exynos4_set_mmc_clk(dev_index, div); in set_mmc_clk()