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1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Chip-specific header file for the SAMA5D4 SoC
19 #define ATMEL_ID_WDT 4 /* Watchdog timer */
31 #define ATMEL_ID_MATRIX1 17 /* H32MX, 32-bit AHB Matrix */
32 #define ATMEL_ID_MATRIX0 18 /* H64MX, 64-bit AHB Matrix */
35 #define ATMEL_ID_SMC 22 /* Multi-bit ECC interrupt */
44 #define ATMEL_ID_USART4 31 /* USART 4 */
45 #define ATMEL_ID_TWI0 32 /* Two-Wire Interface 0 */
46 #define ATMEL_ID_TWI1 33 /* Two-Wire Interface 1 */
47 #define ATMEL_ID_TWI2 34 /* Two-Wire Interface 2 */
54 #define ATMEL_ID_TC1 41 /* Timer Counter 1 (ch. 3, 4, 5) */
73 #define ATMEL_ID_TWI3 62 /* Two-Wire Interface 3 */
92 /* Reserved: 0xf0024000 - 0xf8000000 */
106 /* Reserved: 0xf8034000 - 0xfc000000 */
178 #define H64MX_SLAVE_DDRC_PORT0 3 /* DDR2 Port0-AESOTF */
179 #define H64MX_SLAVE_DDRC_PORT1 4 /* DDR2 Port1 */
195 #define H32MX_SLAVE_NFC_SRAM 4 /* NFC SRAM */