61 	u32 reserved_0x014[3];
63 	u32 reserved_0x024[3];
65 	u32 reserved_0x034[3];
67 	u32 reserved_0x044[3];
69 	u32 reserved_0x054[3];
71 	u32 reserved_0x064[3];
73 	u32 reserved_0x074[3];
75 	u32 reserved_0x084[3];
77 	u32 reserved_0x094[3];
79 	u32 reserved_0x0A4[3];
81 	u32 reserved_0x0B4[3];
85 	u32 reserved_0x0E4[3];
87 	u32 reserved_0x0F4[3];
89 	u32 reserved_0x104[3];
91 	u32 reserved_0x114[3];
93 	u32 reserved_0x124[3];
97 	u32 reserved_0x154[3];
101 	u32 reserved_0x264[3];
103 	u32 reserved_0x274[3];
105 	u32 reserved_0x284[3];
107 	u32 reserved_0x294[3];
109 	u32 reserved_0x2A4[3];
111 	u32 reserved_0x2B4[3];
118 #define CCM_CCR_OSCNT(v)			((v) & 0xff)  argument
122 #define CCM_CCSR_PLL2_PFD_CLK_SEL(v)		(((v) & 0x7) << 19)  argument
126 #define CCM_CCSR_PLL1_PFD_CLK_SEL(v)		(((v) & 0x7) << 16)  argument
137 #define CCM_CCSR_DDRC_CLK_SEL(v)		((v) << 6)  argument
138 #define CCM_CCSR_FAST_CLK_SEL(v)		((v) << 5)  argument
142 #define CCM_CCSR_SYS_CLK_SEL(v)			((v) & 0x7)  argument
146 #define CCM_CACRR_IPG_CLK_DIV(v)		(((v) & 0x3) << 11)  argument
147 #define CCM_CACRR_BUS_CLK_DIV_OFFSET		3
148 #define CCM_CACRR_BUS_CLK_DIV_MASK		(0x7 << 3)
149 #define CCM_CACRR_BUS_CLK_DIV(v)		(((v) & 0x7) << 3)  argument
152 #define CCM_CACRR_ARM_CLK_DIV(v)		((v) & 0x7)  argument
159 #define CCM_CSCMR1_QSPI0_CLK_SEL(v)		(((v) & 0x3) << 22)  argument
162 #define CCM_CSCMR1_ESDHC1_CLK_SEL(v)		(((v) & 0x3) << 18)  argument
165 #define CCM_CSCMR1_NFC_CLK_SEL(v)		(((v) & 0x3) << 12)  argument
174 #define CCM_CSCDR2_NFC_FRAC_DIV(v)		(((v) & 0xf) << 4)  argument
179 #define CCM_CSCDR2_ESDHC1_CLK_DIV(v)		(((v) & 0xf) << 20)  argument
183 #define CCM_CSCDR3_DCU1_DIV(v)			(((v) & 0x7) << 20)  argument
186 #define CCM_CSCDR3_DCU0_DIV(v)			(((v) & 0x7) << 16)  argument
190 #define CCM_CSCDR3_NFC_PRE_DIV(v)		(((v) & 0x7) << 13)  argument
192 #define CCM_CSCDR3_QSPI0_DIV(v)			((v) << 3)  argument
193 #define CCM_CSCDR3_QSPI0_X2_DIV(v)		((v) << 2)  argument
194 #define CCM_CSCDR3_QSPI0_X4_DIV(v)		((v) & 0x3)  argument
198 #define CCM_CSCMR2_RMII_CLK_SEL(v)		(((v) & 0x3) << 4)  argument