Lines Matching refs:n
15 #define __PRCM_CPUS_CFG_PRE(n) (((n) & 0x3) << 4) argument
17 #define __PRCM_CPUS_CFG_PRE_DIV(n) (((n) >> 1) - 1) argument
18 #define PRCM_CPUS_CFG_PRE_DIV(n) \ argument
19 __PRCM_CPUS_CFG_PRE(__PRCM_CPUS_CFG_CLK_PRE(n))
20 #define __PRCM_CPUS_CFG_POST(n) (((n) & 0x1f) << 8) argument
22 #define __PRCM_CPUS_CFG_POST_DIV(n) ((n) - 1) argument
23 #define PRCM_CPUS_CFG_POST_DIV(n) \ argument
24 __PRCM_CPUS_CFG_POST_DIV(__PRCM_CPUS_CFG_POST_DIV(n))
25 #define __PRCM_CPUS_CFG_CLK_SRC(n) (((n) & 0x3) << 16) argument
40 #define __PRCM_APB0_RATIO(n) (((n) & 0x3) << 0) argument
42 #define __PRCM_APB0_RATIO_DIV(n) (((n) >> 1) - 1) argument
43 #define PRCM_APB0_RATIO_DIV(n) \ argument
44 __PRCM_APB0_RATIO(__PRCM_APB0_RATIO_DIV(n))
68 #define __PRCM_PLL_CTRL_USB_CLK_SRC(n) (((n) & 0x3) << 4) argument
83 #define __PRCM_PLL_CTRL_INT_PLL_IN_SEL(n) (((n) & 0x3) << 12) argument
86 #define PRCM_PLL_CTRL_INT_PLL_IN_SEL(n) \ argument
87 __PRCM_PLL_CTRL_INT_PLL_IN_SEL(n)
88 #define __PRCM_PLL_CTRL_HOSC_CLK_SEL(n) (((n) & 0x3) << 20) argument
109 #define __PRCM_PLL_CTRL_VDD_LDO_OUT(n) (((n) & 0x7) << 16) argument
113 #define PRCM_PLL_CTRL_LDO_OUT_L(n) \ argument
114 __PRCM_PLL_CTRL_VDD_LDO_OUT((((n) - 1000) / 20) & 0x7)
115 #define PRCM_PLL_CTRL_LDO_OUT_H(n) \ argument
116 __PRCM_PLL_CTRL_VDD_LDO_OUT((((n) - 1160) / 30) & 0x7)
117 #define PRCM_PLL_CTRL_LDO_OUT_LV(n) \ argument
118 __PRCM_PLL_CTRL_VDD_LDO_OUT((((n) & 0x7) * 20) + 1000)
119 #define PRCM_PLL_CTRL_LDO_OUT_HV(n) \ argument
120 __PRCM_PLL_CTRL_VDD_LDO_OUT((((n) & 0x7) * 30) + 1160)
126 #define __PRCM_CLK_MOD0_M(n) (((n) & 0xf) << 0) argument
128 #define __PRCM_CLK_MOD0_M_X(n) (n - 1) argument
129 #define PRCM_CLK_MOD0_M(n) __PRCM_CLK_MOD0_M(__PRCM_CLK_MOD0_M_X(n)) argument
130 #define PRCM_CLK_MOD0_OUT_PHASE(n) (((n) & 0x7) << 8) argument
131 #define PRCM_CLK_MOD0_OUT_PHASE_MASK(n) PRCM_CLK_MOD0_OUT_PHASE(0x7) argument
132 #define _PRCM_CLK_MOD0_N(n) (((n) & 0x3) << 16) argument
134 #define __PRCM_CLK_MOD0_N_X(n) (((n) >> 1) - 1) argument
135 #define PRCM_CLK_MOD0_N(n) __PRCM_CLK_MOD0_N(__PRCM_CLK_MOD0_N_X(n)) argument
136 #define PRCM_CLK_MOD0_SMPL_PHASE(n) (((n) & 0x7) << 20) argument
138 #define PRCM_CLK_MOD0_SRC_SEL(n) (((n) & 0x7) << 24) argument
150 #define __PRCM_CLK_OUTD_M(n) (((n) & 0x7) << 8) argument
152 #define __PRCM_CLK_OUTD_M_X() ((n) - 1)
153 #define PRCM_CLK_OUTD_M(n) __PRCM_CLK_OUTD_M(__PRCM_CLK_OUTD_M_X(n)) argument
154 #define __PRCM_CLK_OUTD_N(n) (((n) & 0x7) << 20) argument
156 #define __PRCM_CLK_OUTD_N_X(n) (((n) >> 1) - 1) argument
157 #define PRCM_CLK_OUTD_N(n) __PRCM_CLK_OUTD_N(__PRCM_CLK_OUTD_N_X(n) argument
158 #define __PRCM_CLK_OUTD_SRC_SEL(n) (((n) & 0x3) << 24) argument
189 #define PRCM_CPU1_PWR_CLAMP(n) (((n) & 0xff) << 0) argument
192 #define PRCM_CPU2_PWR_CLAMP(n) (((n) & 0xff) << 0) argument
195 #define PRCM_CPU3_PWR_CLAMP(n) (((n) & 0xff) << 0) argument