Lines Matching +full:anatop +full:- +full:reg +full:- +full:offset
2 * Copyright 2015-2016 Freescale Semiconductor, Inc.
9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6ull-pinfunc.h"
14 #include "imx6ull-pinfunc-snvs.h"
52 #address-cells = <1>;
53 #size-cells = <0>;
56 compatible = "arm,cortex-a7";
58 reg = <0>;
59 clock-latency = <61036>; /* two CLK32 periods */
60 operating-points = <
65 fsl,soc-operating-points = <
81 clock-names = "arm", "pll2_bus", "pll2_pfd2_396m", "secondary_sel", "step",
86 intc: interrupt-controller@00a01000 {
87 compatible = "arm,cortex-a7-gic";
88 #interrupt-cells = <3>;
89 interrupt-controller;
90 reg = <0x00a01000 0x1000>,
95 #address-cells = <1>;
96 #size-cells = <0>;
99 compatible = "fixed-clock";
100 reg = <0>;
101 #clock-cells = <0>;
102 clock-frequency = <32768>;
103 clock-output-names = "ckil";
107 compatible = "fixed-clock";
108 reg = <1>;
109 #clock-cells = <0>;
110 clock-frequency = <24000000>;
111 clock-output-names = "osc";
115 compatible = "fixed-clock";
116 reg = <2>;
117 #clock-cells = <0>;
118 clock-frequency = <0>;
119 clock-output-names = "ipp_di0";
123 compatible = "fixed-clock";
124 reg = <3>;
125 #clock-cells = <0>;
126 clock-frequency = <0>;
127 clock-output-names = "ipp_di1";
132 #address-cells = <1>;
133 #size-cells = <1>;
134 compatible = "simple-bus";
135 interrupt-parent = <&gpc>;
151 clock-names = "pll2_pfd2_396m", "pll2_198m", "pll2_bus", "arm", "pll3_usb_otg",
159 compatible = "arm,cortex-a7-pmu";
165 compatible = "fsl,lpm-sram";
166 reg = <0x00900000 0x4000>;
170 compatible = "fsl,ddr-lpm-sram";
171 reg = <0x00904000 0x1000>;
175 compatible = "mmio-sram";
176 reg = <0x00905000 0x1B000>;
179 dma_apbh: dma-apbh@01804000 {
180 compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
181 reg = <0x01804000 0x2000>;
186 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
187 #dma-cells = <1>;
188 dma-channels = <4>;
192 gpmi: gpmi-nand@01806000{
193 compatible = "fsl,imx6q-gpmi-nand";
194 #address-cells = <1>;
195 #size-cells = <1>;
196 reg = <0x01806000 0x2000>, <0x01808000 0x4000>;
197 reg-names = "gpmi-nand", "bch";
199 interrupt-names = "bch";
205 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
208 dma-names = "rx-tx";
212 aips1: aips-bus@02000000 {
213 compatible = "fsl,aips-bus", "simple-bus";
214 #address-cells = <1>;
215 #size-cells = <1>;
216 reg = <0x02000000 0x100000>;
219 spba-bus@02000000 {
220 compatible = "fsl,spba-bus", "simple-bus";
221 #address-cells = <1>;
222 #size-cells = <1>;
223 reg = <0x02000000 0x40000>;
227 compatible = "fsl,imx6ul-spdif", "fsl,imx35-spdif";
228 reg = <0x02004000 0x4000>;
232 dma-names = "rx", "tx";
240 clock-names = "core", "rxtx0",
249 #address-cells = <1>;
250 #size-cells = <0>;
251 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
252 reg = <0x02008000 0x4000>;
256 clock-names = "ipg", "per";
258 dma-names = "rx", "tx";
263 #address-cells = <1>;
264 #size-cells = <0>;
265 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
266 reg = <0x0200c000 0x4000>;
270 clock-names = "ipg", "per";
272 dma-names = "rx", "tx";
277 #address-cells = <1>;
278 #size-cells = <0>;
279 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
280 reg = <0x02010000 0x4000>;
284 clock-names = "ipg", "per";
286 dma-names = "rx", "tx";
291 #address-cells = <1>;
292 #size-cells = <0>;
293 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
294 reg = <0x02014000 0x4000>;
298 clock-names = "ipg", "per";
300 dma-names = "rx", "tx";
305 compatible = "fsl,imx6ul-uart",
306 "fsl,imx6q-uart", "fsl,imx21-uart";
307 reg = <0x02018000 0x4000>;
311 clock-names = "ipg", "per";
313 dma-names = "rx", "tx";
318 compatible = "fsl,imx6ul-uart",
319 "fsl,imx6q-uart", "fsl,imx21-uart";
320 reg = <0x02020000 0x4000>;
324 clock-names = "ipg", "per";
329 compatible = "fsl,imx6ull-esai";
330 reg = <0x02024000 0x4000>;
337 clock-names = "core", "mem", "extal",
340 dma-names = "rx", "tx";
341 dma-source = <&gpr 0 14 0 15>;
346 compatible = "fsl,imx6ul-sai",
347 "fsl,imx6sx-sai";
348 reg = <0x02028000 0x4000>;
354 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
355 dma-names = "rx", "tx";
361 compatible = "fsl,imx6ul-sai",
362 "fsl,imx6sx-sai";
363 reg = <0x0202c000 0x4000>;
369 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
370 dma-names = "rx", "tx";
376 compatible = "fsl,imx6ul-sai",
377 "fsl,imx6sx-sai";
378 reg = <0x02030000 0x4000>;
384 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
385 dma-names = "rx", "tx";
391 compatible = "fsl,imx53-asrc";
392 reg = <0x02034000 0x4000>;
401 clock-names = "mem", "ipg", "asrck_0",
408 dma-names = "rxa", "rxb", "rxc",
410 fsl,asrc-rate = <48000>;
411 fsl,asrc-width = <16>;
417 compatible = "fsl,imx6ul-tsc";
418 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
423 clock-names = "tsc", "adc";
428 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
429 reg = <0x02080000 0x4000>;
433 clock-names = "ipg", "per";
434 #pwm-cells = <2>;
438 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
439 reg = <0x02084000 0x4000>;
443 clock-names = "ipg", "per";
444 #pwm-cells = <2>;
448 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
449 reg = <0x02088000 0x4000>;
453 clock-names = "ipg", "per";
454 #pwm-cells = <2>;
458 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
459 reg = <0x0208c000 0x4000>;
463 clock-names = "ipg", "per";
464 #pwm-cells = <2>;
468 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
469 reg = <0x02090000 0x4000>;
473 clock-names = "ipg", "per";
474 stop-mode = <&gpr 0x10 1 0x10 17>;
479 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
480 reg = <0x02094000 0x4000>;
484 clock-names = "ipg", "per";
485 stop-mode = <&gpr 0x10 2 0x10 18>;
490 compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt";
491 reg = <0x02098000 0x4000>;
495 clock-names = "ipg", "per";
499 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
500 reg = <0x0209c000 0x4000>;
503 gpio-controller;
504 #gpio-cells = <2>;
505 interrupt-controller;
506 #interrupt-cells = <2>;
510 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
511 reg = <0x020a0000 0x4000>;
514 gpio-controller;
515 #gpio-cells = <2>;
516 interrupt-controller;
517 #interrupt-cells = <2>;
521 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
522 reg = <0x020a4000 0x4000>;
525 gpio-controller;
526 #gpio-cells = <2>;
527 interrupt-controller;
528 #interrupt-cells = <2>;
532 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
533 reg = <0x020a8000 0x4000>;
536 gpio-controller;
537 #gpio-cells = <2>;
538 interrupt-controller;
539 #interrupt-cells = <2>;
543 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
544 reg = <0x020ac000 0x4000>;
547 gpio-controller;
548 #gpio-cells = <2>;
549 interrupt-controller;
550 #interrupt-cells = <2>;
554 compatible = "fsl,imx6ul-snvs";
555 reg = <0x020b0000 0x4000>;
560 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
561 reg = <0x020b4000 0x4000>;
569 clock-names = "ipg", "ahb", "ptp",
571 stop-mode = <&gpr 0x10 4>;
572 fsl,num-tx-queues=<1>;
573 fsl,num-rx-queues=<1>;
574 fsl,magic-packet;
580 compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp";
581 reg = <0x020b8000 0x4000>;
588 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
589 reg = <0x020bc000 0x4000>;
595 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
596 reg = <0x020c0000 0x4000>;
603 compatible = "fsl,imx6ul-ccm";
604 reg = <0x020c4000 0x4000>;
607 #clock-cells = <1>;
609 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
612 anatop: anatop@020c8000 { label
613 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
614 "syscon", "simple-bus";
615 reg = <0x020c8000 0x1000>;
620 reg_3p0: regulator-3p0@120 {
621 compatible = "fsl,anatop-regulator";
622 regulator-name = "vdd3p0";
623 regulator-min-microvolt = <2625000>;
624 regulator-max-microvolt = <3400000>;
625 anatop-reg-offset = <0x120>;
626 anatop-vol-bit-shift = <8>;
627 anatop-vol-bit-width = <5>;
628 anatop-min-bit-val = <0>;
629 anatop-min-voltage = <2625000>;
630 anatop-max-voltage = <3400000>;
631 anatop-enable-bit = <0>;
634 reg_arm: regulator-vddcore@140 {
635 compatible = "fsl,anatop-regulator";
636 regulator-name = "cpu";
637 regulator-min-microvolt = <725000>;
638 regulator-max-microvolt = <1450000>;
639 regulator-always-on;
640 anatop-reg-offset = <0x140>;
641 anatop-vol-bit-shift = <0>;
642 anatop-vol-bit-width = <5>;
643 anatop-delay-reg-offset = <0x170>;
644 anatop-delay-bit-shift = <24>;
645 anatop-delay-bit-width = <2>;
646 anatop-min-bit-val = <1>;
647 anatop-min-voltage = <725000>;
648 anatop-max-voltage = <1450000>;
651 reg_soc: regulator-vddsoc@140 {
652 compatible = "fsl,anatop-regulator";
653 regulator-name = "vddsoc";
654 regulator-min-microvolt = <725000>;
655 regulator-max-microvolt = <1450000>;
656 regulator-always-on;
657 anatop-reg-offset = <0x140>;
658 anatop-vol-bit-shift = <18>;
659 anatop-vol-bit-width = <5>;
660 anatop-delay-reg-offset = <0x170>;
661 anatop-delay-bit-shift = <28>;
662 anatop-delay-bit-width = <2>;
663 anatop-min-bit-val = <1>;
664 anatop-min-voltage = <725000>;
665 anatop-max-voltage = <1450000>;
670 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
671 reg = <0x020c9000 0x1000>;
674 phy-3p0-supply = <®_3p0>;
675 fsl,anatop = <&anatop>;
679 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
680 reg = <0x020ca000 0x1000>;
683 phy-3p0-supply = <®_3p0>;
684 fsl,anatop = <&anatop>;
688 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
690 fsl,tempmon = <&anatop>;
691 fsl,tempmon-data = <&ocotp>;
696 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
697 reg = <0x020cc000 0x4000>;
699 snvs_rtc: snvs-rtc-lp {
700 compatible = "fsl,sec-v4.0-mon-rtc-lp";
702 offset = <0x34>;
706 snvs_poweroff: snvs-poweroff {
707 compatible = "syscon-poweroff";
709 offset = <0x38>;
713 snvs_pwrkey: snvs-powerkey {
714 compatible = "fsl,sec-v4.0-pwrkey";
723 reg = <0x020d0000 0x4000>;
728 reg = <0x020d4000 0x4000>;
733 compatible = "fsl,imx6ul-src", "fsl,imx51-src";
734 reg = <0x020d8000 0x4000>;
737 #reset-cells = <1>;
741 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
742 reg = <0x020dc000 0x4000>;
743 interrupt-controller;
744 #interrupt-cells = <3>;
746 interrupt-parent = <&intc>;
747 fsl,mf-mix-wakeup-irq = <0xfc00000 0x7d00 0x0 0x1400640>;
751 compatible = "fsl,imx6ul-iomuxc";
752 reg = <0x020e0000 0x4000>;
755 gpr: iomuxc-gpr@020e4000 {
756 compatible = "fsl,imx6ul-iomuxc-gpr", "syscon";
757 reg = <0x020e4000 0x4000>;
761 compatible = "fsl,imx6sx-mqs";
767 compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt";
768 reg = <0x020e8000 0x4000>;
772 clock-names = "ipg", "per";
776 compatible = "fsl,imx6ul-sdma", "fsl,imx35-sdma";
777 reg = <0x020ec000 0x4000>;
781 clock-names = "ipg", "ahb";
782 #dma-cells = <3>;
784 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
788 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
789 reg = <0x020f0000 0x4000>;
793 clock-names = "ipg", "per";
794 #pwm-cells = <2>;
798 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
799 reg = <0x020f4000 0x4000>;
803 clock-names = "ipg", "per";
804 #pwm-cells = <2>;
808 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
809 reg = <0x020f8000 0x4000>;
813 clock-names = "ipg", "per";
814 #pwm-cells = <2>;
818 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
819 reg = <0x020fc000 0x4000>;
823 clock-names = "ipg", "per";
824 #pwm-cells = <2>;
828 aips2: aips-bus@02100000 {
829 compatible = "fsl,aips-bus", "simple-bus";
830 #address-cells = <1>;
831 #size-cells = <1>;
832 reg = <0x02100000 0x100000>;
836 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
837 reg = <0x02184000 0x200>;
842 fsl,anatop = <&anatop>;
843 ahb-burst-config = <0x0>;
844 tx-burst-size-dword = <0x10>;
845 rx-burst-size-dword = <0x10>;
850 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
851 reg = <0x02184200 0x200>;
856 ahb-burst-config = <0x0>;
857 tx-burst-size-dword = <0x10>;
858 rx-burst-size-dword = <0x10>;
863 #index-cells = <1>;
864 compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc";
865 reg = <0x02184800 0x200>;
869 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
870 reg = <0x02188000 0x4000>;
878 clock-names = "ipg", "ahb", "ptp",
880 stop-mode = <&gpr 0x10 3>;
881 fsl,num-tx-queues=<1>;
882 fsl,num-rx-queues=<1>;
883 fsl,magic-packet;
889 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
890 reg = <0x02190000 0x4000>;
895 clock-names = "ipg", "ahb", "per";
896 bus-width = <4>;
897 fsl,tuning-step= <2>;
902 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
903 reg = <0x02194000 0x4000>;
908 clock-names = "ipg", "ahb", "per";
909 bus-width = <4>;
910 fsl,tuning-step= <2>;
915 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
916 reg = <0x02198000 0x4000>;
919 num-channels = <2>;
920 clock-names = "adc";
925 #address-cells = <1>;
926 #size-cells = <0>;
927 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
928 reg = <0x021a0000 0x4000>;
935 #address-cells = <1>;
936 #size-cells = <0>;
937 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
938 reg = <0x021a4000 0x4000>;
945 #address-cells = <1>;
946 #size-cells = <0>;
947 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
948 reg = <0x021a8000 0x4000>;
955 compatible = "fsl,imx6ul-romcp", "syscon";
956 reg = <0x021ac000 0x4000>;
960 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
961 reg = <0x021b0000 0x4000>;
965 compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim";
966 reg = <0x021b8000 0x4000>;
971 ocotp: ocotp-ctrl@021bc000 {
972 compatible = "fsl,imx6ull-ocotp", "syscon";
973 reg = <0x021bc000 0x4000>;
978 compatible = "fsl,imx6ul-csu";
979 reg = <0x021c0000 0x4000>;
985 compatible = "fsl,imx6ul-csi", "fsl,imx6s-csi";
986 reg = <0x021c4000 0x4000>;
991 clock-names = "disp-axi", "csi_mclk", "disp_dcic";
996 compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
997 reg = <0x021c8000 0x4000>;
1002 clock-names = "pix", "axi", "disp_axi";
1007 compatible = "fsl,imx6ull-pxp-dma", "fsl,imx7d-pxp-dma";
1008 reg = <0x021cc000 0x4000>;
1012 clock-names = "pxp_ipg", "pxp_axi";
1017 #address-cells = <1>;
1018 #size-cells = <0>;
1019 compatible = "fsl,imx6ull-qspi", "fsl,imx6ul-qspi";
1020 reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
1021 reg-names = "QuadSPI", "QuadSPI-memory";
1025 clock-names = "qspi_en", "qspi";
1030 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
1031 reg = <0x021e4000 0x4000>;
1038 compatible = "fsl,imx6ul-uart",
1039 "fsl,imx6q-uart", "fsl,imx21-uart";
1040 reg = <0x021e8000 0x4000>;
1044 clock-names = "ipg", "per";
1046 dma-names = "rx", "tx";
1051 compatible = "fsl,imx6ul-uart",
1052 "fsl,imx6q-uart", "fsl,imx21-uart";
1053 reg = <0x021ec000 0x4000>;
1057 clock-names = "ipg", "per";
1059 dma-names = "rx", "tx";
1064 compatible = "fsl,imx6ul-uart",
1065 "fsl,imx6q-uart", "fsl,imx21-uart";
1066 reg = <0x021f0000 0x4000>;
1070 clock-names = "ipg", "per";
1072 dma-names = "rx", "tx";
1077 compatible = "fsl,imx6ul-uart",
1078 "fsl,imx6q-uart", "fsl,imx21-uart";
1079 reg = <0x021f4000 0x4000>;
1083 clock-names = "ipg", "per";
1085 dma-names = "rx", "tx";
1090 #address-cells = <1>;
1091 #size-cells = <0>;
1092 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
1093 reg = <0x021f8000 0x4000>;
1100 compatible = "fsl,imx6ul-uart",
1101 "fsl,imx6q-uart", "fsl,imx21-uart";
1102 reg = <0x021fc000 0x4000>;
1106 clock-names = "ipg", "per";
1108 dma-names = "rx", "tx";
1113 aips3: aips-bus@02200000 {
1114 compatible = "fsl,aips-bus", "simple-bus";
1115 #address-cells = <1>;
1116 #size-cells = <1>;
1117 reg = <0x02200000 0x100000>;
1121 reg = <0x02280000 0x4000>;
1126 clock-names = "dcp";
1131 reg = <0x02284000 0x4000>;
1136 compatible = "fsl,imx6ul-uart",
1137 "fsl,imx6q-uart", "fsl,imx21-uart";
1138 reg = <0x02288000 0x4000>;
1142 clock-names = "ipg", "per";
1144 dma-names = "rx", "tx";
1149 compatible = "fsl,imx7d-epdc";
1151 reg = <0x0228c000 0x4000>;
1154 clock-names = "epdc_axi", "epdc_pix";
1155 /* Need to fix epdc-ram */
1156 /* epdc-ram = <&gpr 0x4 30>; */
1160 iomuxc_snvs: iomuxc-snvs@02290000 {
1161 compatible = "fsl,imx6ull-iomuxc-snvs";
1162 reg = <0x02290000 0x10000>;
1165 snvs_gpr: snvs-gpr@0x02294000 {
1166 compatible = "fsl, imx6ull-snvs-gpr";
1167 reg = <0x02294000 0x10000>;