arm/dts/dragonboard820c.dts

1 // SPDX-License-Identifier: GPL-2.0+
3  * Qualcomm APQ8096 based Dragonboard 820C board device tree source
5  * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
8 /dts-v1/;
11 #include <dt-bindings/pinctrl/pinctrl-snapdragon.h>
15 	compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
16 	#address-cells = <2>;
17 	#size-cells = <2>;
24 		stdout-path = "serial0:115200n8";
32 	reserved-memory {
33 		#address-cells = <2>;
34 		#size-cells = <2>;
39 			no-map;
44 		compatible = "arm,psci-1.0";
50 		memory-region = <&smem_mem>;
54 		#address-cells = <1>;
55 		#size-cells = <1>;
57 		compatible = "simple-bus";
59 		gcc: clock-controller@300000 {
60 			compatible = "qcom,gcc-msm8996";
61 			#clock-cells = <1>;
62 			#reset-cells = <1>;
63 			#power-domain-cells = <1>;
68 			compatible = "qcom,tlmm-apq8096";
74 				drive-strength = <DRIVE_STRENGTH_8MA>;
75 				bias-disable;
80 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
83 			pinctrl-names = "uart";
84 			pinctrl-0 = <&blsp8_uart>;
88 			compatible = "qcom,sdhci-msm-v4";
91 			bus-width = <4>;
93 			clock-frequency = <200000000>;
97 			compatible = "qcom,spmi-pmic-arb";
101 			#address-cells = <0x1>;
102 			#size-cells = <0x1>;
105 				compatible = "qcom,spmi-pmic";
107 				#address-cells = <0x1>;
108 				#size-cells = <0x1>;
111 					compatible = "qcom,pm8994-pwrkey";
113 					#gpio-cells = <2>;
114 					gpio-controller;
115 					gpio-bank-name="pm8994_key.";
119 					compatible = "qcom,pm8994-gpio";
121 					gpio-controller;
122 					gpio-count = <24>;
123 					#gpio-cells = <2>;
124 					gpio-bank-name="pm8994.";
129 				compatible = "qcom,spmi-pmic";
131 				#address-cells = <0x1>;
132 				#size-cells = <0x1>;
139 #include "dragonboard820c-uboot.dtsi"