arm/dts/am437x-idk-evm.dts

108 		pinctrl-0 = <&gpio_keys_pins_default>;
110 		switch@0 {
119 		#clock-cells = <0>;
128 			AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7)	/* cam0_field.gpio4_2 */
134 			AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
135 			AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
141 			AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
142 			AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
148 			AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
149 			AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
155 			AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
156 			AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
162 			AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
163 			AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
164 			AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
165 			AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
166 			AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
167 			AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
168 			AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
174 			AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
175 			AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
176 			AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
177 			AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
178 			AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
179 			AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
180 			AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
186 			AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
192 			AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
193 			AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
194 			AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
195 			AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
196 			AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td2 */
197 			AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td3 */
198 			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
199 			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
200 			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
201 			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
202 			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd2 */
203 			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd3 */
209 			AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
210 			AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
211 			AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
212 			AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
213 			AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
214 			AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
215 			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
216 			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
217 			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
218 			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
219 			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
220 			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
227 			AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
228 			AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
235 			AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
236 			AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
242 			AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_csn0.qspi_csn */
243 			AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)		/* gpmc_csn3.qspi_clk */
244 			AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_advn_ale.qspi_d0 */
245 			AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_oen_ren.qspi_d1 */
246 			AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_wen.qspi_d2 */
247 			AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_be0n_cle.qspi_d3 */
253 			AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
254 			AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
255 			AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
256 			AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
257 			AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
258 			AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
266 	pinctrl-0 = <&i2c0_pins_default>;
273 		reg = <0x50>;
278 		reg = <0x60>;
293 	pinctrl-0 = <&i2c2_pins_default>;
305 	pinctrl-0 = <&ecap0_pins_default>;
327 	pinctrl-0 = <&mmc1_pins_default>;
337 	pinctrl-0 = <&qspi_pins_default>;
341 	m25p80@0 {
344 		reg = <0>;
356 		partition@0 {
358 			reg = <0x00000000 0x000080000>;
362 			reg = <0x00080000 0x00080000>;
366 			reg = <0x00100000 0x00010000>;
370 			reg = <0x00110000 0x00010000>;
374 			reg = <0x00120000 0x00010000>;
378 			reg = <0x00130000 0x0800000>;
382 			reg = <0x00930000 0x36D0000>;
389 	pinctrl-0 = <&cpsw_default>;
396 	pinctrl-0 = <&davinci_mdio_default>;
402 	phy_id = <&davinci_mdio>, <0>;