Lines Matching +full:0 +full:x10c

45 			reg = <0x4b000000 1000000>;
53 	pinctrl-0 = <&gpio_mux_pins>;
57 			0x1d0 (PIN_INPUT | MUX_MODE0)	/* tms jtag */
58 			0x1d4 (PIN_INPUT | MUX_MODE0)	/* tdi jtag */
59 			0x1d8 (PIN_OUTPUT | MUX_MODE0)	/* tdo jtag */
60 			0x1dc (PIN_INPUT | MUX_MODE0)	/* tck jtag */
61 			0x1e0 (PIN_INPUT | MUX_MODE0)	/* trstn jtag */
67 			0x0E8 (PIN_INPUT_PULLUP | MUX_MODE7)	/* lcd_plck FIX STO should be a OUTPUT driven high*/
68 			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_crs.rmii1_crs_dv */
69 			0x114 (PIN_OUTPUT | MUX_MODE1)		/* mii1_txen.mii1_txen */
70 			0x124 (PIN_OUTPUT | MUX_MODE1)		/* mii1_txd1.mii1_txd1 */
71 			0x128 (PIN_OUTPUT | MUX_MODE1)		/* mii1_txd0.mii1_txd0 */
72 			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxd1.mii1_rxd1 */
73 			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxd0.mii1_rxd0 */
74 			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* rmii1_refclk.rmii1_refclk */
80 			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
81 			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
82 			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
83 			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
84 			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
85 			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
86 			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
93 			0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
94 			0x14c (PIN_OUTPUT | MUX_MODE0)			/* mdio_clk.mdio_clk */
101 			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
102 			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
109 			0x148 (PIN_INPUT | MUX_MODE7)	/* mdio_data.mdio_data GPIO0_0 */
110 			0x14c (PIN_OUTPUT | MUX_MODE7)	/* mdio_clk.mdio_clk GPIO0_1 */
117 	pinctrl-0 = <&cpsw_default>;
124 		pinctrl-0 = <&gpio_mdio_default>;
127 		#size-cells = <0>;
129 			 &gpio0 0 GPIO_ACTIVE_HIGH>;	/* MDIO-DATA */
132 			reg = <0>;
140 	pinctrl-0 = <&davinci_mdio_default>;
146 	phy_id = <&mdio0>, <0>;