Lines Matching +full:implementation +full:- +full:defined
15 bool "Enable multiple CPUs to enter into U-Boot"
21 CPUECTLR_EL1.SMPEN bit before U-Boot.
33 or when CPU implementation doesn't include that register.
36 bool "Support spin-table enable method"
39 Say Y here to support "spin-table" enable method for booting Linux.
42 - Specify enable-method = "spin-table" in each CPU node in the
44 - Bring secondary CPUs into U-Boot proper in a board specific
49 U-Boot automatically does:
50 - Set "cpu-release-addr" property of each CPU node
52 - Reserve the code for the spin-table and the release address
65 - Address of secure firmware.
66 - Address to hold the return address from secure firmware.
67 - Secure firmware FIT image related information.
69 - The target exception level that secure monitor firmware will
80 bool "PSCI implementation in secure monitor firmware"
83 This config enables the ARMv8 PSCI implementation in secure monitor
84 firmware. This is a private PSCI implementation and different from
125 PSCI is Power State Coordination Interface defined by ARM.
126 The PSCI in U-boot provides a general framework and each platform
137 the actual hardware implementation.
147 System with multi-cluster should difine their own exact value.
163 If not defined, the PSCI sections are placed together with the u-boot
165 places such as some secure RAM built-in SOC etc.