Lines Matching full:ck
26 uint32_t ck; in ddr_init() local
34 ck = get_sdram_clk_rate(); in ddr_init()
41 writel((ck / dram->trp) & 0x0000000F, &emc->t_rp); in ddr_init()
42 writel((ck / dram->tras) & 0x0000000F, &emc->t_ras); in ddr_init()
43 writel((ck / dram->tsrex) & 0x0000007F, &emc->t_srex); in ddr_init()
44 writel((ck / dram->twr) & 0x0000000F, &emc->t_wr); in ddr_init()
45 writel((ck / dram->trc) & 0x0000001F, &emc->t_rc); in ddr_init()
46 writel((ck / dram->trfc) & 0x0000001F, &emc->t_rfc); in ddr_init()
47 writel((ck / dram->txsr) & 0x000000FF, &emc->t_xsr); in ddr_init()
52 writel((((ck / dram->refresh) >> 4) & 0x7FF), &emc->refresh); in ddr_init()
54 /* Force all clocks, enable inverted ck, issue NOP command */ in ddr_init()
59 /* Fast dynamic refresh for at least a few SDRAM ck cycles */ in ddr_init()
63 writel((((ck / dram->refresh) >> 4) & 0x7FF), &emc->refresh); in ddr_init()