Lines Matching refs:possible
19 - p_impedance_override: DDR driver software p-impedance override; possible
26 - n_impedance_override: DDR driver software n-impedance override; possible
33 - odt_termination_value: ODT termination value for I/Os; possible values:
36 - ddr_type: Selects voltage level for DDR pads; possible
41 possible values:
44 - m_odr: Disable memory transaction reordering; possible
48 - clock_adjust: Clock adjust; possible values:
53 - ext_refresh_rec: Extended refresh recovery time; possible values:
55 - read_to_write: Read-to-write turnaround; possible values:
57 - write_to_read: Write-to-read turnaround; possible values:
59 - read_to_read: Read-to-read turnaround; possible values:
61 - write_to_write: Write-to-write turnaround; possible values:
63 - active_powerdown_exit: Active powerdown exit timing; possible values:
65 - precharge_powerdown_exit: Precharge powerdown exit timing; possible values:
67 - odt_powerdown_exit: ODT powerdown exit timing; possible values:
70 - mode_reg_set_cycle: Mode register set cycle time; possible values:
72 - precharge_to_activate: Precharge-to-acitvate interval; possible values:
74 - activate_to_precharge: Activate to precharge interval; possible values:
78 possible values:
80 - mcas_latency: MCAS latency from READ command; possible values:
94 - refresh_recovery: Refresh recovery time; possible values:
97 - last_data_to_precharge: Last data to precharge minimum interval; possible
100 - activate_to_activate: Activate-to-activate interval; possible values:
103 interval; possible values:
105 - additive_latency: Additive latency; possible values:
107 - mcas_to_preamble_override: MCAS-to-preamble-override; possible values:
128 - write_latency: Write latency; possible values:
130 - read_to_precharge: Read to precharge; possible values:
133 adjustment; possible values:
141 - minimum_cke_pulse_width: Minimum CKE pulse width; possible values:
143 - four_activates_window: Window for four activates; possible values:
146 - self_refresh: Self refresh (during sleep); possible values:
149 - ecc: Support for ECC; possible values:
152 - registered_dram: Support for registered DRAM; possible values:
155 - sdram_type: Type of SDRAM device to be used; possible values:
158 - dynamic_power_management: Dynamic power management mode; possible values:
161 - databus_width: DRAM data bus width; possible values
164 - nc_auto_precharge: Non-concurrent auto-precharge; possible values:
167 - timing_2t: 2T timing; possible values:
170 - bank_interleaving_ctrl: Bank (chip select) interleaving control; possible
174 - precharge_bit_8: Precharge bin 8; possible values
177 - half_strength: Global half-strength override; possible values:
180 - bypass_initialization: Bypass initialization; possible values:
183 - force_self_refresh: Force self refresh; possible values:
186 - dll_reset: DLL reset; possible values:
189 - dqs_config: DQS configuration; possible values:
191 - odt_config: ODT configuration; possible values:
206 - refresh_interval: Refresh interval; possible values:
208 - precharge_interval: Precharge interval; possible values:
220 - auto_precharge: Chip select auto-precharge; possible values:
223 - odt_rd_cfg: ODT for reads configuration; possible values:
229 - odt_wr_cfg: ODT for writes configuration; possible values:
235 - bank_bits: Number of bank bits for SDRAM on chip select; possible
238 - row_bits: Number of row bits for SDRAM on chip select; possible values:
240 - col_bits: Number of column bits for SDRAM on chip select; possible