Lines Matching +full:reserved +full:- +full:cpu +full:- +full:vectors
3 * All rights reserved.
31 #include "cpu-qom.h"
32 #include "qemu/cpu-float.h"
33 #include "exec/cpu-defs.h"
35 #include "xtensa-isa.h"
218 ((MAX_INSN_LENGTH + sizeof(xtensa_insnbuf_word) - 1) / \
244 /* Static vectors */
249 /* Dynamic vectors */
556 * An Xtensa CPU.
569 * @config: The CPU core configuration.
571 * An Xtensa CPU model.
586 void xtensa_cpu_do_interrupt(CPUState *cpu);
587 bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);
592 hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
595 void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
598 int xtensa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
599 int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
600 G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
640 env->static_vectors = n; in xtensa_select_static_vectors()
650 return (config->options & opt) != 0; in xtensa_option_bits_enabled()
660 int level = (env->sregs[PS] & PS_INTLEVEL) >> PS_INTLEVEL_SHIFT; in xtensa_get_cintlevel()
661 if ((env->sregs[PS] & PS_EXCM) && env->config->excm_level > level) { in xtensa_get_cintlevel()
662 level = env->config->excm_level; in xtensa_get_cintlevel()
669 if (xtensa_option_bits_enabled(env->config, in xtensa_get_ring()
672 return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; in xtensa_get_ring()
680 if (xtensa_option_bits_enabled(env->config, in xtensa_get_cring()
683 (env->sregs[PS] & PS_EXCM) == 0) { in xtensa_get_cring()
684 return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; in xtensa_get_cring()
699 return env->system_er; in xtensa_get_er_region()
708 return env->sregs[WINDOW_START] | in xtensa_replicate_windowstart()
709 (env->sregs[WINDOW_START] << env->config->nareg / 4); in xtensa_replicate_windowstart()
734 #include "exec/cpu-all.h"
739 *pc = env->pc; in cpu_get_tb_cpu_state()
743 if (env->sregs[PS] & PS_EXCM) { in cpu_get_tb_cpu_state()
745 } else if (xtensa_option_enabled(env->config, XTENSA_OPTION_LOOP)) { in cpu_get_tb_cpu_state()
747 env->sregs[LEND] - (env->pc & -(1u << TARGET_PAGE_BITS)); in cpu_get_tb_cpu_state()
763 if (lend_dist < (1u << TARGET_PAGE_BITS) + env->config->max_insn_size) { in cpu_get_tb_cpu_state()
764 target_ulong lbeg_off = env->sregs[LEND] - env->sregs[LBEG]; in cpu_get_tb_cpu_state()
772 if (xtensa_option_enabled(env->config, XTENSA_OPTION_EXTENDED_L32R) && in cpu_get_tb_cpu_state()
773 (env->sregs[LITBASE] & 1)) { in cpu_get_tb_cpu_state()
776 if (xtensa_option_enabled(env->config, XTENSA_OPTION_DEBUG)) { in cpu_get_tb_cpu_state()
777 if (xtensa_get_cintlevel(env) < env->config->debug_level) { in cpu_get_tb_cpu_state()
780 if (xtensa_get_cintlevel(env) < env->sregs[ICOUNTLEVEL]) { in cpu_get_tb_cpu_state()
784 if (xtensa_option_enabled(env->config, XTENSA_OPTION_COPROCESSOR)) { in cpu_get_tb_cpu_state()
785 *flags |= env->sregs[CPENABLE] << XTENSA_TBFLAG_CPENABLE_SHIFT; in cpu_get_tb_cpu_state()
787 if (xtensa_option_enabled(env->config, XTENSA_OPTION_WINDOWED_REGISTER) && in cpu_get_tb_cpu_state()
788 (env->sregs[PS] & (PS_WOE | PS_EXCM)) == PS_WOE) { in cpu_get_tb_cpu_state()
790 (env->sregs[WINDOW_BASE] + 1); in cpu_get_tb_cpu_state()
794 *flags |= extract32(env->sregs[PS], PS_CALLINC_SHIFT, in cpu_get_tb_cpu_state()
799 if (env->yield_needed) { in cpu_get_tb_cpu_state()