Lines Matching full:r2
211 static inline void gen_offset_ld(DisasContext *ctx, TCGv r1, TCGv r2, in gen_offset_ld() argument
215 tcg_gen_addi_tl(temp, r2, con); in gen_offset_ld()
219 static inline void gen_offset_st(DisasContext *ctx, TCGv r1, TCGv r2, in gen_offset_st() argument
223 tcg_gen_addi_tl(temp, r2, con); in gen_offset_st()
260 static void gen_st_preincr(DisasContext *ctx, TCGv r1, TCGv r2, int16_t off, in gen_st_preincr() argument
264 tcg_gen_addi_tl(temp, r2, off); in gen_st_preincr()
266 tcg_gen_mov_tl(r2, temp); in gen_st_preincr()
269 static void gen_ld_preincr(DisasContext *ctx, TCGv r1, TCGv r2, int16_t off, in gen_ld_preincr() argument
273 tcg_gen_addi_tl(temp, r2, off); in gen_ld_preincr()
275 tcg_gen_mov_tl(r2, temp); in gen_ld_preincr()
395 static inline void gen_add_d(TCGv ret, TCGv r1, TCGv r2) in gen_add_d() argument
400 tcg_gen_add_tl(result, r1, r2); in gen_add_d()
403 tcg_gen_xor_tl(t0, r1, r2); in gen_add_d()
417 gen_add64_d(TCGv_i64 ret, TCGv_i64 r1, TCGv_i64 r2) in gen_add64_d() argument
424 tcg_gen_add_i64(result, r1, r2); in gen_add64_d()
427 tcg_gen_xor_i64(t0, r1, r2); in gen_add64_d()
443 gen_addsub64_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_addsub64_h() argument
452 (*op1)(temp, r1_low, r2); in gen_addsub64_h()
455 tcg_gen_xor_tl(temp3, r1_low, r2); in gen_addsub64_h()
488 /* ret = r2 + (r1 * r3); */
489 static inline void gen_madd32_d(TCGv ret, TCGv r1, TCGv r2, TCGv r3) in gen_madd32_d() argument
496 tcg_gen_ext_i32_i64(t2, r2); in gen_madd32_d()
520 static inline void gen_maddi32_d(TCGv ret, TCGv r1, TCGv r2, int32_t con) in gen_maddi32_d() argument
523 gen_madd32_d(ret, r1, r2, temp); in gen_maddi32_d()
601 gen_madd_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_madd_h() argument
610 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_madd_h()
613 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_madd_h()
616 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_madd_h()
619 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_madd_h()
628 gen_maddsu_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_maddsu_h() argument
637 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_maddsu_h()
640 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_maddsu_h()
643 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_maddsu_h()
646 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_maddsu_h()
655 gen_maddsum_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_maddsum_h() argument
664 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_maddsum_h()
667 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_maddsum_h()
670 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_maddsum_h()
673 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_maddsum_h()
687 static inline void gen_adds(TCGv ret, TCGv r1, TCGv r2);
690 gen_madds_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_madds_h() argument
701 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_madds_h()
704 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_madds_h()
707 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_madds_h()
710 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_madds_h()
724 static inline void gen_subs(TCGv ret, TCGv r1, TCGv r2);
727 gen_maddsus_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_maddsus_h() argument
738 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_maddsus_h()
741 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_maddsus_h()
744 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_maddsus_h()
747 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_maddsus_h()
762 gen_maddsums_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_maddsums_h() argument
771 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_maddsums_h()
774 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_maddsums_h()
777 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_maddsums_h()
780 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_maddsums_h()
795 gen_maddm_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_maddm_h() argument
804 GEN_HELPER_LL(mulm_h, temp64, r2, r3, t_n); in gen_maddm_h()
807 GEN_HELPER_LU(mulm_h, temp64, r2, r3, t_n); in gen_maddm_h()
810 GEN_HELPER_UL(mulm_h, temp64, r2, r3, t_n); in gen_maddm_h()
813 GEN_HELPER_UU(mulm_h, temp64, r2, r3, t_n); in gen_maddm_h()
823 gen_maddms_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_maddms_h() argument
831 GEN_HELPER_LL(mulm_h, temp64, r2, r3, t_n); in gen_maddms_h()
834 GEN_HELPER_LU(mulm_h, temp64, r2, r3, t_n); in gen_maddms_h()
837 GEN_HELPER_UL(mulm_h, temp64, r2, r3, t_n); in gen_maddms_h()
840 GEN_HELPER_UU(mulm_h, temp64, r2, r3, t_n); in gen_maddms_h()
849 gen_maddr64_h(TCGv ret, TCGv r1_low, TCGv r1_high, TCGv r2, TCGv r3, uint32_t n, in gen_maddr64_h() argument
856 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_maddr64_h()
859 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_maddr64_h()
862 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_maddr64_h()
865 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_maddr64_h()
872 gen_maddr32_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode) in gen_maddr32_h() argument
879 gen_maddr64_h(ret, temp, temp2, r2, r3, n, mode); in gen_maddr32_h()
883 gen_maddsur32_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode) in gen_maddsur32_h() argument
891 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_maddsur32_h()
894 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_maddsur32_h()
897 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_maddsur32_h()
900 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_maddsur32_h()
910 gen_maddr64s_h(TCGv ret, TCGv r1_low, TCGv r1_high, TCGv r2, TCGv r3, in gen_maddr64s_h() argument
917 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_maddr64s_h()
920 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_maddr64s_h()
923 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_maddr64s_h()
926 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_maddr64s_h()
933 gen_maddr32s_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode) in gen_maddr32s_h() argument
940 gen_maddr64s_h(ret, temp, temp2, r2, r3, n, mode); in gen_maddr32s_h()
944 gen_maddsur32s_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode) in gen_maddsur32s_h() argument
952 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_maddsur32s_h()
955 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_maddsur32s_h()
958 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_maddsur32s_h()
961 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_maddsur32s_h()
970 gen_maddr_q(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n) in gen_maddr_q() argument
973 gen_helper_maddr_q(ret, tcg_env, r1, r2, r3, t_n); in gen_maddr_q()
977 gen_maddrs_q(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n) in gen_maddrs_q() argument
980 gen_helper_maddr_q_ssov(ret, tcg_env, r1, r2, r3, t_n); in gen_maddrs_q()
1043 /* catch special case r1 = r2 = 0x8000 */ in gen_m16add32_q()
1060 /* catch special case r1 = r2 = 0x8000 */ in gen_m16adds32_q()
1082 /* catch special case r1 = r2 = 0x8000 */ in gen_m16add64_q()
1108 /* catch special case r1 = r2 = 0x8000 */ in gen_m16adds64_q()
1198 /* ret = r2 - (r1 * r3); */
1199 static inline void gen_msub32_d(TCGv ret, TCGv r1, TCGv r2, TCGv r3) in gen_msub32_d() argument
1206 tcg_gen_ext_i32_i64(t2, r2); in gen_msub32_d()
1231 static inline void gen_msubi32_d(TCGv ret, TCGv r1, TCGv r2, int32_t con) in gen_msubi32_d() argument
1234 gen_msub32_d(ret, r1, r2, temp); in gen_msubi32_d()
1309 static inline void gen_addi_d(TCGv ret, TCGv r1, target_ulong r2) in gen_addi_d() argument
1311 TCGv temp = tcg_constant_i32(r2); in gen_addi_d()
1316 static inline void gen_add_CC(TCGv ret, TCGv r1, TCGv r2) in gen_add_CC() argument
1323 tcg_gen_add2_i32(result, cpu_PSW_C, r1, t0, r2, t0); in gen_add_CC()
1326 tcg_gen_xor_tl(t0, r1, r2); in gen_add_CC()
1345 static inline void gen_addc_CC(TCGv ret, TCGv r1, TCGv r2) in gen_addc_CC() argument
1355 tcg_gen_add2_i32(result, cpu_PSW_C, result, cpu_PSW_C, r2, t0); in gen_addc_CC()
1358 tcg_gen_xor_tl(t0, r1, r2); in gen_addc_CC()
1377 static inline void gen_cond_add(TCGCond cond, TCGv r1, TCGv r2, TCGv r3, in gen_cond_add() argument
1390 tcg_gen_add_tl(result, r1, r2); in gen_cond_add()
1393 tcg_gen_xor_tl(temp2, r1, r2); in gen_cond_add()
1410 static inline void gen_condi_add(TCGCond cond, TCGv r1, int32_t r2, in gen_condi_add() argument
1413 TCGv temp = tcg_constant_i32(r2); in gen_condi_add()
1417 static inline void gen_sub_d(TCGv ret, TCGv r1, TCGv r2) in gen_sub_d() argument
1422 tcg_gen_sub_tl(result, r1, r2); in gen_sub_d()
1425 tcg_gen_xor_tl(temp, r1, r2); in gen_sub_d()
1439 gen_sub64_d(TCGv_i64 ret, TCGv_i64 r1, TCGv_i64 r2) in gen_sub64_d() argument
1446 tcg_gen_sub_i64(result, r1, r2); in gen_sub64_d()
1449 tcg_gen_xor_i64(t0, r1, r2); in gen_sub64_d()
1464 static inline void gen_sub_CC(TCGv ret, TCGv r1, TCGv r2) in gen_sub_CC() argument
1469 tcg_gen_sub_tl(result, r1, r2); in gen_sub_CC()
1471 tcg_gen_setcond_tl(TCG_COND_GEU, cpu_PSW_C, r1, r2); in gen_sub_CC()
1474 tcg_gen_xor_tl(temp, r1, r2); in gen_sub_CC()
1487 static inline void gen_subc_CC(TCGv ret, TCGv r1, TCGv r2) in gen_subc_CC() argument
1490 tcg_gen_not_tl(temp, r2); in gen_subc_CC()
1494 static inline void gen_cond_sub(TCGCond cond, TCGv r1, TCGv r2, TCGv r3, in gen_cond_sub() argument
1507 tcg_gen_sub_tl(result, r1, r2); in gen_cond_sub()
1510 tcg_gen_xor_tl(temp2, r1, r2); in gen_cond_sub()
1528 gen_msub_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_msub_h() argument
1537 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_msub_h()
1540 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_msub_h()
1543 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_msub_h()
1546 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_msub_h()
1555 gen_msubs_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_msubs_h() argument
1566 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_msubs_h()
1569 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_msubs_h()
1572 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_msubs_h()
1575 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_msubs_h()
1590 gen_msubm_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_msubm_h() argument
1599 GEN_HELPER_LL(mulm_h, temp64, r2, r3, t_n); in gen_msubm_h()
1602 GEN_HELPER_LU(mulm_h, temp64, r2, r3, t_n); in gen_msubm_h()
1605 GEN_HELPER_UL(mulm_h, temp64, r2, r3, t_n); in gen_msubm_h()
1608 GEN_HELPER_UU(mulm_h, temp64, r2, r3, t_n); in gen_msubm_h()
1618 gen_msubms_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_msubms_h() argument
1626 GEN_HELPER_LL(mulm_h, temp64, r2, r3, t_n); in gen_msubms_h()
1629 GEN_HELPER_LU(mulm_h, temp64, r2, r3, t_n); in gen_msubms_h()
1632 GEN_HELPER_UL(mulm_h, temp64, r2, r3, t_n); in gen_msubms_h()
1635 GEN_HELPER_UU(mulm_h, temp64, r2, r3, t_n); in gen_msubms_h()
1644 gen_msubr64_h(TCGv ret, TCGv r1_low, TCGv r1_high, TCGv r2, TCGv r3, uint32_t n, in gen_msubr64_h() argument
1651 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_msubr64_h()
1654 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_msubr64_h()
1657 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_msubr64_h()
1660 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_msubr64_h()
1667 gen_msubr32_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode) in gen_msubr32_h() argument
1674 gen_msubr64_h(ret, temp, temp2, r2, r3, n, mode); in gen_msubr32_h()
1678 gen_msubr64s_h(TCGv ret, TCGv r1_low, TCGv r1_high, TCGv r2, TCGv r3, in gen_msubr64s_h() argument
1685 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_msubr64s_h()
1688 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_msubr64s_h()
1691 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_msubr64s_h()
1694 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_msubr64s_h()
1701 gen_msubr32s_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode) in gen_msubr32s_h() argument
1708 gen_msubr64s_h(ret, temp, temp2, r2, r3, n, mode); in gen_msubr32s_h()
1712 gen_msubr_q(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n) in gen_msubr_q() argument
1715 gen_helper_msubr_q(ret, tcg_env, r1, r2, r3, temp); in gen_msubr_q()
1719 gen_msubrs_q(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n) in gen_msubrs_q() argument
1722 gen_helper_msubr_q_ssov(ret, tcg_env, r1, r2, r3, temp); in gen_msubrs_q()
1776 /* catch special case r1 = r2 = 0x8000 */ in gen_m16sub32_q()
1793 /* catch special case r1 = r2 = 0x8000 */ in gen_m16subs32_q()
1815 /* catch special case r1 = r2 = 0x8000 */ in gen_m16sub64_q()
1841 /* catch special case r1 = r2 = 0x8000 */ in gen_m16subs64_q()
1937 gen_msubad_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_msubad_h() argument
1946 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_msubad_h()
1949 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_msubad_h()
1952 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_msubad_h()
1955 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_msubad_h()
1964 gen_msubadm_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_msubadm_h() argument
1973 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_msubadm_h()
1976 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_msubadm_h()
1979 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_msubadm_h()
1982 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_msubadm_h()
1997 gen_msubadr32_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode) in gen_msubadr32_h() argument
2005 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_msubadr32_h()
2008 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_msubadr32_h()
2011 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_msubadr32_h()
2014 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_msubadr32_h()
2023 gen_msubads_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_msubads_h() argument
2034 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_msubads_h()
2037 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_msubads_h()
2040 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_msubads_h()
2043 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_msubads_h()
2058 gen_msubadms_h(TCGv ret_low, TCGv ret_high, TCGv r1_low, TCGv r1_high, TCGv r2, in gen_msubadms_h() argument
2067 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_msubadms_h()
2070 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_msubadms_h()
2073 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_msubadms_h()
2076 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_msubadms_h()
2090 gen_msubadr32s_h(TCGv ret, TCGv r1, TCGv r2, TCGv r3, uint32_t n, uint32_t mode) in gen_msubadr32s_h() argument
2098 GEN_HELPER_LL(mul_h, temp64, r2, r3, t_n); in gen_msubadr32s_h()
2101 GEN_HELPER_LU(mul_h, temp64, r2, r3, t_n); in gen_msubadr32s_h()
2104 GEN_HELPER_UL(mul_h, temp64, r2, r3, t_n); in gen_msubadr32s_h()
2107 GEN_HELPER_UU(mul_h, temp64, r2, r3, t_n); in gen_msubadr32s_h()
2130 static inline void gen_absdif(TCGv ret, TCGv r1, TCGv r2) in gen_absdif() argument
2135 tcg_gen_sub_tl(result, r1, r2); in gen_absdif()
2136 tcg_gen_sub_tl(temp, r2, r1); in gen_absdif()
2137 tcg_gen_movcond_tl(TCG_COND_GT, result, r1, r2, result, temp); in gen_absdif()
2141 tcg_gen_xor_tl(temp, result, r2); in gen_absdif()
2142 tcg_gen_movcond_tl(TCG_COND_GT, cpu_PSW_V, r1, r2, cpu_PSW_V, temp); in gen_absdif()
2143 tcg_gen_xor_tl(temp, r1, r2); in gen_absdif()
2168 static inline void gen_mul_i32s(TCGv ret, TCGv r1, TCGv r2) in gen_mul_i32s() argument
2173 tcg_gen_muls2_tl(low, high, r1, r2); in gen_mul_i32s()
2194 static inline void gen_mul_i64s(TCGv ret_low, TCGv ret_high, TCGv r1, TCGv r2) in gen_mul_i64s() argument
2196 tcg_gen_muls2_tl(ret_low, ret_high, r1, r2); in gen_mul_i64s()
2215 static inline void gen_mul_i64u(TCGv ret_low, TCGv ret_high, TCGv r1, TCGv r2) in gen_mul_i64u() argument
2217 tcg_gen_mulu2_tl(ret_low, ret_high, r1, r2); in gen_mul_i64u()
2249 static inline void gen_maddsi_32(TCGv ret, TCGv r1, TCGv r2, int32_t con) in gen_maddsi_32() argument
2252 gen_helper_madd32_ssov(ret, tcg_env, r1, r2, temp); in gen_maddsi_32()
2255 static inline void gen_maddsui_32(TCGv ret, TCGv r1, TCGv r2, int32_t con) in gen_maddsui_32() argument
2258 gen_helper_madd32_suov(ret, tcg_env, r1, r2, temp); in gen_maddsui_32()
2294 /* overflow only occurs if r1 = r2 = 0x8000 */ in gen_mul_q()
2327 /* catch special case r1 = r2 = 0x8000 */ in gen_mul_q_16()
2350 /* catch special case r1 = r2 = 0x8000 */ in gen_mulr_q()
2402 static inline void gen_msubsi_32(TCGv ret, TCGv r1, TCGv r2, int32_t con) in gen_msubsi_32() argument
2405 gen_helper_msub32_ssov(ret, tcg_env, r1, r2, temp); in gen_msubsi_32()
2408 static inline void gen_msubsui_32(TCGv ret, TCGv r1, TCGv r2, int32_t con) in gen_msubsui_32() argument
2411 gen_helper_msub32_suov(ret, tcg_env, r1, r2, temp); in gen_msubsui_32()
2541 static void gen_shas(TCGv ret, TCGv r1, TCGv r2) in gen_shas() argument
2543 gen_helper_sha_ssov(ret, tcg_env, r1, r2); in gen_shas()
2577 /* ret = {ret[30:0], (r1 cond r2)}; */
2578 static void gen_sh_cond(int cond, TCGv ret, TCGv r1, TCGv r2) in gen_sh_cond() argument
2584 tcg_gen_setcond_tl(cond, temp2, r1, r2); in gen_sh_cond()
2594 static inline void gen_adds(TCGv ret, TCGv r1, TCGv r2) in gen_adds() argument
2596 gen_helper_add_ssov(ret, tcg_env, r1, r2); in gen_adds()
2611 static inline void gen_subs(TCGv ret, TCGv r1, TCGv r2) in gen_subs() argument
2613 gen_helper_sub_ssov(ret, tcg_env, r1, r2); in gen_subs()
2616 static inline void gen_subsu(TCGv ret, TCGv r1, TCGv r2) in gen_subsu() argument
2618 gen_helper_sub_suov(ret, tcg_env, r1, r2); in gen_subsu()
2621 static inline void gen_bit_2op(TCGv ret, TCGv r1, TCGv r2, in gen_bit_2op() argument
2631 tcg_gen_shri_tl(temp2, r2, pos2); in gen_bit_2op()
2640 /* ret = r1[pos1] op1 r2[pos2]; */
2641 static inline void gen_bit_1op(TCGv ret, TCGv r1, TCGv r2, in gen_bit_1op() argument
2650 tcg_gen_shri_tl(temp2, r2, pos2); in gen_bit_1op()
2658 static inline void gen_accumulating_cond(int cond, TCGv ret, TCGv r1, TCGv r2, in gen_accumulating_cond() argument
2664 tcg_gen_setcond_tl(cond, temp, r1, r2); in gen_accumulating_cond()
2728 ret = (r1 & ~mask) | (r2 << pos) & mask); */
2729 static inline void gen_insert(TCGv ret, TCGv r1, TCGv r2, TCGv width, TCGv pos) in gen_insert() argument
2739 tcg_gen_shl_tl(temp, r2, pos); in gen_insert()
2762 gen_dvinit_b(DisasContext *ctx, TCGv rl, TCGv rh, TCGv r1, TCGv r2) in gen_dvinit_b() argument
2767 gen_helper_dvinit_b_13(ret, tcg_env, r1, r2); in gen_dvinit_b()
2769 gen_helper_dvinit_b_131(ret, tcg_env, r1, r2); in gen_dvinit_b()
2775 gen_dvinit_h(DisasContext *ctx, TCGv rl, TCGv rh, TCGv r1, TCGv r2) in gen_dvinit_h() argument
2780 gen_helper_dvinit_h_13(ret, tcg_env, r1, r2); in gen_dvinit_h()
2782 gen_helper_dvinit_h_131(ret, tcg_env, r1, r2); in gen_dvinit_h()
2846 TCGv r2, int16_t address) in gen_branch_cond() argument
2849 tcg_gen_brcond_tl(cond, r1, r2, jumpLabel); in gen_branch_cond()
2858 int r2, int16_t address) in gen_branch_condi() argument
2860 TCGv temp = tcg_constant_i32(r2); in gen_branch_condi()
2897 int r2 , int32_t constant , int32_t offset) in gen_compute_branch() argument
3078 gen_branch_cond(ctx, TCG_COND_EQ, cpu_gpr_d[r1], cpu_gpr_d[r2], in gen_compute_branch()
3081 gen_branch_cond(ctx, TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[r2], in gen_compute_branch()
3087 gen_branch_cond(ctx, TCG_COND_EQ, cpu_gpr_a[r1], cpu_gpr_a[r2], in gen_compute_branch()
3090 gen_branch_cond(ctx, TCG_COND_NE, cpu_gpr_a[r1], cpu_gpr_a[r2], in gen_compute_branch()
3096 gen_branch_cond(ctx, TCG_COND_GE, cpu_gpr_d[r1], cpu_gpr_d[r2], in gen_compute_branch()
3099 gen_branch_cond(ctx, TCG_COND_GEU, cpu_gpr_d[r1], cpu_gpr_d[r2], in gen_compute_branch()
3105 gen_branch_cond(ctx, TCG_COND_LT, cpu_gpr_d[r1], cpu_gpr_d[r2], in gen_compute_branch()
3108 gen_branch_cond(ctx, TCG_COND_LTU, cpu_gpr_d[r1], cpu_gpr_d[r2], in gen_compute_branch()
3114 gen_loop(ctx, r2, offset * 2); in gen_compute_branch()
3125 /* also save r2, in case of r1 == r2, so r2 is not decremented */ in gen_compute_branch()
3126 tcg_gen_mov_tl(temp2, cpu_gpr_d[r2]); in gen_compute_branch()
3132 /* also save r2, in case of r1 == r2, so r2 is not decremented */ in gen_compute_branch()
3133 tcg_gen_mov_tl(temp2, cpu_gpr_d[r2]); in gen_compute_branch()
3235 int r1, r2; in decode_srr_opc() local
3239 r2 = MASK_OP_SRR_S2(ctx->opcode); in decode_srr_opc()
3243 gen_add_d(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3246 gen_add_d(cpu_gpr_d[r1], cpu_gpr_d[15], cpu_gpr_d[r2]); in decode_srr_opc()
3249 gen_add_d(cpu_gpr_d[15], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3252 tcg_gen_add_tl(cpu_gpr_a[r1], cpu_gpr_a[r1], cpu_gpr_a[r2]); in decode_srr_opc()
3255 gen_adds(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3258 tcg_gen_and_tl(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3263 cpu_gpr_d[r2], cpu_gpr_d[r1]); in decode_srr_opc()
3268 cpu_gpr_d[r2], cpu_gpr_d[r1]); in decode_srr_opc()
3272 cpu_gpr_d[r2]); in decode_srr_opc()
3276 cpu_gpr_d[r2]); in decode_srr_opc()
3279 tcg_gen_mov_tl(cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3282 tcg_gen_mov_tl(cpu_gpr_a[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3285 tcg_gen_mov_tl(cpu_gpr_a[r1], cpu_gpr_a[r2]); in decode_srr_opc()
3288 tcg_gen_mov_tl(cpu_gpr_d[r1], cpu_gpr_a[r2]); in decode_srr_opc()
3291 gen_mul_i32s(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3294 tcg_gen_or_tl(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3297 gen_sub_d(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3300 gen_sub_d(cpu_gpr_d[r1], cpu_gpr_d[15], cpu_gpr_d[r2]); in decode_srr_opc()
3303 gen_sub_d(cpu_gpr_d[15], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3306 gen_subs(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3309 tcg_gen_xor_tl(cpu_gpr_d[r1], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_srr_opc()
3318 int r1, r2; in decode_ssr_opc() local
3321 r2 = MASK_OP_SSR_S2(ctx->opcode); in decode_ssr_opc()
3325 tcg_gen_qemu_st_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUL); in decode_ssr_opc()
3328 tcg_gen_qemu_st_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUL); in decode_ssr_opc()
3329 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4); in decode_ssr_opc()
3332 tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_UB); in decode_ssr_opc()
3335 tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_UB); in decode_ssr_opc()
3336 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 1); in decode_ssr_opc()
3339 tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUW); in decode_ssr_opc()
3342 tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUW); in decode_ssr_opc()
3343 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 2); in decode_ssr_opc()
3346 tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUL); in decode_ssr_opc()
3349 tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LEUL); in decode_ssr_opc()
3350 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4); in decode_ssr_opc()
3402 int r1, r2; in decode_slr_opc() local
3405 r2 = MASK_OP_SLR_S2(ctx->opcode); in decode_slr_opc()
3410 tcg_gen_qemu_ld_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESL); in decode_slr_opc()
3413 tcg_gen_qemu_ld_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESL); in decode_slr_opc()
3414 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4); in decode_slr_opc()
3417 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_UB); in decode_slr_opc()
3420 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_UB); in decode_slr_opc()
3421 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 1); in decode_slr_opc()
3424 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESW); in decode_slr_opc()
3427 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESW); in decode_slr_opc()
3428 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 2); in decode_slr_opc()
3431 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESL); in decode_slr_opc()
3434 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESL); in decode_slr_opc()
3435 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4); in decode_slr_opc()
3444 int r2; in decode_sro_opc() local
3447 r2 = MASK_OP_SRO_S2(ctx->opcode); in decode_sro_opc()
3453 gen_offset_ld(ctx, cpu_gpr_a[15], cpu_gpr_a[r2], address * 4, MO_LESL); in decode_sro_opc()
3456 gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB); in decode_sro_opc()
3459 gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW); in decode_sro_opc()
3462 gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4, MO_LESL); in decode_sro_opc()
3465 gen_offset_st(ctx, cpu_gpr_a[15], cpu_gpr_a[r2], address * 4, MO_LESL); in decode_sro_opc()
3468 gen_offset_st(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB); in decode_sro_opc()
3471 gen_offset_st(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW); in decode_sro_opc()
3474 gen_offset_st(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4, MO_LESL); in decode_sro_opc()
3550 int r1, r2; in decode_16Bit_opc() local
3617 r2 = MASK_OP_SRRS_S2(ctx->opcode); in decode_16Bit_opc()
3622 tcg_gen_add_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], temp); in decode_16Bit_opc()
3961 int r1, r2, r3; in decode_bit_andacc() local
3965 r2 = MASK_OP_BIT_S2(ctx->opcode); in decode_bit_andacc()
3974 gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_andacc()
3978 gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_andacc()
3983 gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_andacc()
3986 gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_andacc()
3991 gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_andacc()
4002 int r1, r2, r3; in decode_bit_logical_t() local
4005 r2 = MASK_OP_BIT_S2(ctx->opcode); in decode_bit_logical_t()
4013 gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_logical_t()
4017 gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_logical_t()
4021 gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_logical_t()
4025 gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_logical_t()
4036 int r1, r2, r3; in decode_bit_insert() local
4041 r2 = MASK_OP_BIT_S2(ctx->opcode); in decode_bit_insert()
4048 tcg_gen_shri_tl(temp, cpu_gpr_d[r2], pos2); in decode_bit_insert()
4059 int r1, r2, r3; in decode_bit_logical_t2() local
4064 r2 = MASK_OP_BIT_S2(ctx->opcode); in decode_bit_logical_t2()
4071 gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_logical_t2()
4075 gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_logical_t2()
4079 gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_logical_t2()
4083 gen_bit_1op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_logical_t2()
4095 int r1, r2, r3; in decode_bit_orand() local
4100 r2 = MASK_OP_BIT_S2(ctx->opcode); in decode_bit_orand()
4107 gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_orand()
4111 gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_orand()
4116 gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_orand()
4119 gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_orand()
4124 gen_bit_2op(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_orand()
4135 int r1, r2, r3; in decode_bit_sh_logic1() local
4141 r2 = MASK_OP_BIT_S2(ctx->opcode); in decode_bit_sh_logic1()
4150 gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_sh_logic1()
4154 gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_sh_logic1()
4158 gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_sh_logic1()
4162 gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_sh_logic1()
4175 int r1, r2, r3; in decode_bit_sh_logic2() local
4181 r2 = MASK_OP_BIT_S2(ctx->opcode); in decode_bit_sh_logic2()
4190 gen_bit_1op(temp, cpu_gpr_d[r1] , cpu_gpr_d[r2] , in decode_bit_sh_logic2()
4194 gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_sh_logic2()
4198 gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_sh_logic2()
4202 gen_bit_1op(temp, cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_bit_sh_logic2()
4219 int32_t r1, r2; in decode_bo_addrmode_post_pre_base() local
4223 r2 = MASK_OP_BO_S2(ctx->opcode); in decode_bo_addrmode_post_pre_base()
4238 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4245 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4256 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4264 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4270 gen_offset_st(ctx, cpu_gpr_a[r1], cpu_gpr_a[r2], off10, MO_LESL); in decode_bo_addrmode_post_pre_base()
4273 tcg_gen_qemu_st_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_post_pre_base()
4275 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4278 gen_st_preincr(ctx, cpu_gpr_a[r1], cpu_gpr_a[r2], off10, MO_LESL); in decode_bo_addrmode_post_pre_base()
4281 gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_UB); in decode_bo_addrmode_post_pre_base()
4284 tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_post_pre_base()
4286 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4289 gen_st_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_UB); in decode_bo_addrmode_post_pre_base()
4293 gen_offset_st_2regs(cpu_gpr_d[r1+1], cpu_gpr_d[r1], cpu_gpr_a[r2], in decode_bo_addrmode_post_pre_base()
4298 gen_st_2regs_64(cpu_gpr_d[r1+1], cpu_gpr_d[r1], cpu_gpr_a[r2], ctx); in decode_bo_addrmode_post_pre_base()
4299 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4304 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4306 tcg_gen_mov_tl(cpu_gpr_a[r2], temp); in decode_bo_addrmode_post_pre_base()
4310 gen_offset_st_2regs(cpu_gpr_a[r1+1], cpu_gpr_a[r1], cpu_gpr_a[r2], in decode_bo_addrmode_post_pre_base()
4315 gen_st_2regs_64(cpu_gpr_a[r1+1], cpu_gpr_a[r1], cpu_gpr_a[r2], ctx); in decode_bo_addrmode_post_pre_base()
4316 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4321 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4323 tcg_gen_mov_tl(cpu_gpr_a[r2], temp); in decode_bo_addrmode_post_pre_base()
4326 gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW); in decode_bo_addrmode_post_pre_base()
4329 tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_post_pre_base()
4331 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4334 gen_st_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW); in decode_bo_addrmode_post_pre_base()
4339 gen_offset_st(ctx, temp, cpu_gpr_a[r2], off10, MO_LEUW); in decode_bo_addrmode_post_pre_base()
4344 tcg_gen_qemu_st_tl(temp, cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_post_pre_base()
4346 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4351 gen_st_preincr(ctx, temp, cpu_gpr_a[r2], off10, MO_LEUW); in decode_bo_addrmode_post_pre_base()
4354 gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUL); in decode_bo_addrmode_post_pre_base()
4357 tcg_gen_qemu_st_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_post_pre_base()
4359 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_post_pre_base()
4362 gen_st_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUL); in decode_bo_addrmode_post_pre_base()
4373 int32_t r1, r2; in decode_bo_addrmode_bitreverse_circular() local
4377 r2 = MASK_OP_BO_S2(ctx->opcode); in decode_bo_addrmode_bitreverse_circular()
4384 CHECK_REG_PAIR(r2); in decode_bo_addrmode_bitreverse_circular()
4385 tcg_gen_ext16u_tl(temp, cpu_gpr_a[r2+1]); in decode_bo_addrmode_bitreverse_circular()
4386 tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp); in decode_bo_addrmode_bitreverse_circular()
4392 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_bitreverse_circular()
4397 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_bitreverse_circular()
4401 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_bitreverse_circular()
4405 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_bitreverse_circular()
4409 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_bitreverse_circular()
4413 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_bitreverse_circular()
4418 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_bitreverse_circular()
4423 tcg_gen_shri_tl(temp2, cpu_gpr_a[r2+1], 16); in decode_bo_addrmode_bitreverse_circular()
4426 tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp); in decode_bo_addrmode_bitreverse_circular()
4428 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_bitreverse_circular()
4433 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_bitreverse_circular()
4438 tcg_gen_shri_tl(temp2, cpu_gpr_a[r2+1], 16); in decode_bo_addrmode_bitreverse_circular()
4441 tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp); in decode_bo_addrmode_bitreverse_circular()
4443 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_bitreverse_circular()
4447 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_bitreverse_circular()
4451 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_bitreverse_circular()
4456 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_bitreverse_circular()
4461 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_bitreverse_circular()
4465 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_bitreverse_circular()
4469 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_bitreverse_circular()
4480 int32_t r1, r2; in decode_bo_addrmode_ld_post_pre_base() local
4484 r2 = MASK_OP_BO_S2(ctx->opcode); in decode_bo_addrmode_ld_post_pre_base()
4490 gen_offset_ld(ctx, cpu_gpr_a[r1], cpu_gpr_a[r2], off10, MO_LEUL); in decode_bo_addrmode_ld_post_pre_base()
4493 tcg_gen_qemu_ld_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_ld_post_pre_base()
4495 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4498 gen_ld_preincr(ctx, cpu_gpr_a[r1], cpu_gpr_a[r2], off10, MO_LEUL); in decode_bo_addrmode_ld_post_pre_base()
4501 gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_SB); in decode_bo_addrmode_ld_post_pre_base()
4504 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_ld_post_pre_base()
4506 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4509 gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_SB); in decode_bo_addrmode_ld_post_pre_base()
4512 gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_UB); in decode_bo_addrmode_ld_post_pre_base()
4515 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_ld_post_pre_base()
4517 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4520 gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_UB); in decode_bo_addrmode_ld_post_pre_base()
4524 gen_offset_ld_2regs(cpu_gpr_d[r1+1], cpu_gpr_d[r1], cpu_gpr_a[r2], in decode_bo_addrmode_ld_post_pre_base()
4529 gen_ld_2regs_64(cpu_gpr_d[r1+1], cpu_gpr_d[r1], cpu_gpr_a[r2], ctx); in decode_bo_addrmode_ld_post_pre_base()
4530 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4535 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4537 tcg_gen_mov_tl(cpu_gpr_a[r2], temp); in decode_bo_addrmode_ld_post_pre_base()
4541 gen_offset_ld_2regs(cpu_gpr_a[r1+1], cpu_gpr_a[r1], cpu_gpr_a[r2], in decode_bo_addrmode_ld_post_pre_base()
4546 gen_ld_2regs_64(cpu_gpr_a[r1+1], cpu_gpr_a[r1], cpu_gpr_a[r2], ctx); in decode_bo_addrmode_ld_post_pre_base()
4547 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4552 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4554 tcg_gen_mov_tl(cpu_gpr_a[r2], temp); in decode_bo_addrmode_ld_post_pre_base()
4557 gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LESW); in decode_bo_addrmode_ld_post_pre_base()
4560 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_ld_post_pre_base()
4562 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4565 gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LESW); in decode_bo_addrmode_ld_post_pre_base()
4568 gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW); in decode_bo_addrmode_ld_post_pre_base()
4571 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_ld_post_pre_base()
4573 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4576 gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW); in decode_bo_addrmode_ld_post_pre_base()
4579 gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW); in decode_bo_addrmode_ld_post_pre_base()
4583 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_ld_post_pre_base()
4586 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4589 gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUW); in decode_bo_addrmode_ld_post_pre_base()
4593 gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUL); in decode_bo_addrmode_ld_post_pre_base()
4596 tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, in decode_bo_addrmode_ld_post_pre_base()
4598 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_ld_post_pre_base()
4601 gen_ld_preincr(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], off10, MO_LEUL); in decode_bo_addrmode_ld_post_pre_base()
4612 int r1, r2; in decode_bo_addrmode_ld_bitreverse_circular() local
4616 r2 = MASK_OP_BO_S2(ctx->opcode); in decode_bo_addrmode_ld_bitreverse_circular()
4623 CHECK_REG_PAIR(r2); in decode_bo_addrmode_ld_bitreverse_circular()
4624 tcg_gen_ext16u_tl(temp, cpu_gpr_a[r2+1]); in decode_bo_addrmode_ld_bitreverse_circular()
4625 tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp); in decode_bo_addrmode_ld_bitreverse_circular()
4631 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ld_bitreverse_circular()
4635 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ld_bitreverse_circular()
4639 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ld_bitreverse_circular()
4643 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ld_bitreverse_circular()
4647 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ld_bitreverse_circular()
4651 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ld_bitreverse_circular()
4656 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ld_bitreverse_circular()
4661 tcg_gen_shri_tl(temp2, cpu_gpr_a[r2+1], 16); in decode_bo_addrmode_ld_bitreverse_circular()
4664 tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp); in decode_bo_addrmode_ld_bitreverse_circular()
4666 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ld_bitreverse_circular()
4671 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ld_bitreverse_circular()
4676 tcg_gen_shri_tl(temp2, cpu_gpr_a[r2+1], 16); in decode_bo_addrmode_ld_bitreverse_circular()
4679 tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp); in decode_bo_addrmode_ld_bitreverse_circular()
4681 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ld_bitreverse_circular()
4685 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ld_bitreverse_circular()
4689 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ld_bitreverse_circular()
4693 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ld_bitreverse_circular()
4697 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ld_bitreverse_circular()
4702 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ld_bitreverse_circular()
4707 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ld_bitreverse_circular()
4711 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ld_bitreverse_circular()
4715 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ld_bitreverse_circular()
4726 int r1, r2; in decode_bo_addrmode_stctx_post_pre_base() local
4731 r2 = MASK_OP_BO_S2(ctx->opcode); in decode_bo_addrmode_stctx_post_pre_base()
4740 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4744 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4748 gen_ldmst(ctx, r1, cpu_gpr_a[r2]); in decode_bo_addrmode_stctx_post_pre_base()
4749 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4752 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4753 gen_ldmst(ctx, r1, cpu_gpr_a[r2]); in decode_bo_addrmode_stctx_post_pre_base()
4756 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4760 tcg_gen_addi_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4763 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4767 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4771 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4775 gen_swap(ctx, r1, cpu_gpr_a[r2]); in decode_bo_addrmode_stctx_post_pre_base()
4776 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4779 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4780 gen_swap(ctx, r1, cpu_gpr_a[r2]); in decode_bo_addrmode_stctx_post_pre_base()
4783 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4787 gen_cmpswap(ctx, r1, cpu_gpr_a[r2]); in decode_bo_addrmode_stctx_post_pre_base()
4788 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4791 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4792 gen_cmpswap(ctx, r1, cpu_gpr_a[r2]); in decode_bo_addrmode_stctx_post_pre_base()
4795 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4799 gen_swapmsk(ctx, r1, cpu_gpr_a[r2]); in decode_bo_addrmode_stctx_post_pre_base()
4800 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4803 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10); in decode_bo_addrmode_stctx_post_pre_base()
4804 gen_swapmsk(ctx, r1, cpu_gpr_a[r2]); in decode_bo_addrmode_stctx_post_pre_base()
4815 int r1, r2; in decode_bo_addrmode_ldmst_bitreverse_circular() local
4819 r2 = MASK_OP_BO_S2(ctx->opcode); in decode_bo_addrmode_ldmst_bitreverse_circular()
4826 CHECK_REG_PAIR(r2); in decode_bo_addrmode_ldmst_bitreverse_circular()
4827 tcg_gen_ext16u_tl(temp, cpu_gpr_a[r2+1]); in decode_bo_addrmode_ldmst_bitreverse_circular()
4828 tcg_gen_add_tl(temp2, cpu_gpr_a[r2], temp); in decode_bo_addrmode_ldmst_bitreverse_circular()
4833 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ldmst_bitreverse_circular()
4837 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ldmst_bitreverse_circular()
4841 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ldmst_bitreverse_circular()
4845 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ldmst_bitreverse_circular()
4849 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ldmst_bitreverse_circular()
4853 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ldmst_bitreverse_circular()
4857 gen_helper_br_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1]); in decode_bo_addrmode_ldmst_bitreverse_circular()
4861 gen_helper_circ_update(cpu_gpr_a[r2+1], cpu_gpr_a[r2+1], t_off10); in decode_bo_addrmode_ldmst_bitreverse_circular()
4870 int r1, r2; in decode_bol_opc() local
4875 r2 = MASK_OP_BOL_S2(ctx->opcode); in decode_bol_opc()
4881 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], address); in decode_bol_opc()
4886 tcg_gen_addi_tl(temp, cpu_gpr_a[r2], address); in decode_bol_opc()
4890 tcg_gen_addi_tl(cpu_gpr_a[r1], cpu_gpr_a[r2], address); in decode_bol_opc()
4894 gen_offset_st(ctx, cpu_gpr_a[r1], cpu_gpr_a[r2], address, MO_LEUL); in decode_bol_opc()
4900 gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_LEUL); in decode_bol_opc()
4904 gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_SB); in decode_bol_opc()
4911 gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_UB); in decode_bol_opc()
4918 gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_LESW); in decode_bol_opc()
4925 gen_offset_ld(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_LEUW); in decode_bol_opc()
4932 gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_SB); in decode_bol_opc()
4939 gen_offset_st(ctx, cpu_gpr_d[r1], cpu_gpr_a[r2], address, MO_LESW); in decode_bol_opc()
4953 int r1, r2; in decode_rc_logical_shift() local
4957 r2 = MASK_OP_RC_D(ctx->opcode); in decode_rc_logical_shift()
4964 tcg_gen_andi_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_logical_shift()
4967 tcg_gen_andi_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], ~const9); in decode_rc_logical_shift()
4972 tcg_gen_nand_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp); in decode_rc_logical_shift()
4977 tcg_gen_nor_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp); in decode_rc_logical_shift()
4980 tcg_gen_ori_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_logical_shift()
4983 tcg_gen_ori_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], ~const9); in decode_rc_logical_shift()
4987 gen_shi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_logical_shift()
4991 gen_sh_hi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_logical_shift()
4995 gen_shaci(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_logical_shift()
4999 gen_sha_hi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_logical_shift()
5002 gen_shasi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_logical_shift()
5005 tcg_gen_xori_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_logical_shift()
5006 tcg_gen_not_tl(cpu_gpr_d[r2], cpu_gpr_d[r2]); in decode_rc_logical_shift()
5009 tcg_gen_xori_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_logical_shift()
5014 gen_helper_shuffle(cpu_gpr_d[r2], cpu_gpr_d[r1], temp); in decode_rc_logical_shift()
5027 int r1, r2; in decode_rc_accumulator() local
5032 r2 = MASK_OP_RC_D(ctx->opcode); in decode_rc_accumulator()
5042 gen_absdifi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5045 gen_absdifsi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5048 gen_addi_d(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5051 gen_addci_CC(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5054 gen_addsi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5057 gen_addsui(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5060 gen_addi_CC(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5063 gen_accumulating_condi(TCG_COND_EQ, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5067 gen_accumulating_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5072 gen_accumulating_condi(TCG_COND_GEU, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5076 gen_accumulating_condi(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5081 gen_accumulating_condi(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5085 gen_accumulating_condi(TCG_COND_NE, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5089 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5092 gen_eqany_bi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5095 gen_eqany_hi(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5098 tcg_gen_setcondi_tl(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5102 tcg_gen_setcondi_tl(TCG_COND_GEU, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5105 tcg_gen_setcondi_tl(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5109 tcg_gen_setcondi_tl(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5113 tcg_gen_movcond_tl(TCG_COND_GT, cpu_gpr_d[r2], cpu_gpr_d[r1], temp, in decode_rc_accumulator()
5118 tcg_gen_movcond_tl(TCG_COND_GTU, cpu_gpr_d[r2], cpu_gpr_d[r1], temp, in decode_rc_accumulator()
5123 tcg_gen_movcond_tl(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1], temp, in decode_rc_accumulator()
5128 tcg_gen_movcond_tl(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1], temp, in decode_rc_accumulator()
5132 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5135 gen_accumulating_condi(TCG_COND_EQ, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5139 gen_accumulating_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5144 gen_accumulating_condi(TCG_COND_GEU, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5148 gen_accumulating_condi(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5153 gen_accumulating_condi(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5157 gen_accumulating_condi(TCG_COND_NE, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5162 gen_sub_d(cpu_gpr_d[r2], temp, cpu_gpr_d[r1]); in decode_rc_accumulator()
5166 gen_subs(cpu_gpr_d[r2], temp, cpu_gpr_d[r1]); in decode_rc_accumulator()
5170 gen_subsu(cpu_gpr_d[r2], temp, cpu_gpr_d[r1]); in decode_rc_accumulator()
5173 gen_sh_condi(TCG_COND_EQ, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5176 gen_sh_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5180 gen_sh_condi(TCG_COND_GEU, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5183 gen_sh_condi(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5187 gen_sh_condi(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5190 gen_sh_condi(TCG_COND_NE, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5193 gen_accumulating_condi(TCG_COND_EQ, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5197 gen_accumulating_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5202 gen_accumulating_condi(TCG_COND_GEU, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5206 gen_accumulating_condi(TCG_COND_LT, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5211 gen_accumulating_condi(TCG_COND_LTU, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5215 gen_accumulating_condi(TCG_COND_NE, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5250 int r1, r2; in decode_rc_mul() local
5253 r2 = MASK_OP_RC_D(ctx->opcode); in decode_rc_mul()
5261 gen_muli_i32s(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_mul()
5264 CHECK_REG_PAIR(r2); in decode_rc_mul()
5265 gen_muli_i64s(cpu_gpr_d[r2], cpu_gpr_d[r2+1], cpu_gpr_d[r1], const9); in decode_rc_mul()
5268 gen_mulsi_i32(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_mul()
5272 CHECK_REG_PAIR(r2); in decode_rc_mul()
5273 gen_muli_i64u(cpu_gpr_d[r2], cpu_gpr_d[r2+1], cpu_gpr_d[r1], const9); in decode_rc_mul()
5277 gen_mulsui_i32(cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_mul()
5288 int r1, r2; in decode_rcpw_insert() local
5295 r2 = MASK_OP_RCPW_D(ctx->opcode); in decode_rcpw_insert()
5302 CHECK_REG_PAIR(r2); in decode_rcpw_insert()
5305 tcg_gen_movi_tl(cpu_gpr_d[r2+1], ((1u << width) - 1) << pos); in decode_rcpw_insert()
5306 tcg_gen_movi_tl(cpu_gpr_d[r2], (const4 << pos)); in decode_rcpw_insert()
5312 tcg_gen_mov_tl(cpu_gpr_d[r2], cpu_gpr_d[r1]); in decode_rcpw_insert()
5316 tcg_gen_deposit_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp, pos, width); in decode_rcpw_insert()
5524 int r1, r2; in decode_rlc_opc() local
5528 r2 = MASK_OP_RLC_D(ctx->opcode); in decode_rlc_opc()
5532 gen_addi_d(cpu_gpr_d[r2], cpu_gpr_d[r1], const16); in decode_rlc_opc()
5535 gen_addi_d(cpu_gpr_d[r2], cpu_gpr_d[r1], const16 << 16); in decode_rlc_opc()
5538 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r1], const16 << 16); in decode_rlc_opc()
5542 gen_mfcr(ctx, cpu_gpr_d[r2], const16); in decode_rlc_opc()
5545 tcg_gen_movi_tl(cpu_gpr_d[r2], const16); in decode_rlc_opc()
5549 CHECK_REG_PAIR(r2); in decode_rlc_opc()
5550 tcg_gen_movi_tl(cpu_gpr_d[r2], const16); in decode_rlc_opc()
5551 tcg_gen_movi_tl(cpu_gpr_d[r2+1], const16 >> 15); in decode_rlc_opc()
5558 tcg_gen_movi_tl(cpu_gpr_d[r2], const16); in decode_rlc_opc()
5561 tcg_gen_movi_tl(cpu_gpr_d[r2], const16 << 16); in decode_rlc_opc()
5564 tcg_gen_movi_tl(cpu_gpr_a[r2], const16 << 16); in decode_rlc_opc()
5579 int r3, r2, r1; in decode_rr_accumulator() local
5584 r2 = MASK_OP_RR_S2(ctx->opcode); in decode_rr_accumulator()
5590 gen_abs(cpu_gpr_d[r3], cpu_gpr_d[r2]); in decode_rr_accumulator()
5593 gen_helper_abs_b(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r2]); in decode_rr_accumulator()
5596 gen_helper_abs_h(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r2]); in decode_rr_accumulator()
5599 gen_absdif(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5603 cpu_gpr_d[r2]); in decode_rr_accumulator()
5607 cpu_gpr_d[r2]); in decode_rr_accumulator()
5611 cpu_gpr_d[r2]); in decode_rr_accumulator()
5615 cpu_gpr_d[r2]); in decode_rr_accumulator()
5618 gen_helper_abs_ssov(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r2]); in decode_rr_accumulator()
5621 gen_helper_abs_h_ssov(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r2]); in decode_rr_accumulator()
5624 gen_add_d(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5627 gen_helper_add_b(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5630 gen_helper_add_h(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5633 gen_addc_CC(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5636 gen_adds(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5640 cpu_gpr_d[r2]); in decode_rr_accumulator()
5644 cpu_gpr_d[r2]); in decode_rr_accumulator()
5648 cpu_gpr_d[r2]); in decode_rr_accumulator()
5651 gen_add_CC(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5655 cpu_gpr_d[r2], &tcg_gen_and_tl); in decode_rr_accumulator()
5659 cpu_gpr_d[r2], &tcg_gen_and_tl); in decode_rr_accumulator()
5663 cpu_gpr_d[r2], &tcg_gen_and_tl); in decode_rr_accumulator()
5667 cpu_gpr_d[r2], &tcg_gen_and_tl); in decode_rr_accumulator()
5671 cpu_gpr_d[r2], &tcg_gen_and_tl); in decode_rr_accumulator()
5675 cpu_gpr_d[r2], &tcg_gen_and_tl); in decode_rr_accumulator()
5679 cpu_gpr_d[r2]); in decode_rr_accumulator()
5682 gen_helper_eq_b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5685 gen_helper_eq_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5689 cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5692 gen_helper_eqany_b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5695 gen_helper_eqany_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5699 cpu_gpr_d[r2]); in decode_rr_accumulator()
5703 cpu_gpr_d[r2]); in decode_rr_accumulator()
5707 cpu_gpr_d[r2]); in decode_rr_accumulator()
5711 cpu_gpr_d[r2]); in decode_rr_accumulator()
5714 gen_helper_lt_b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5717 gen_helper_lt_bu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5720 gen_helper_lt_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5723 gen_helper_lt_hu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5727 cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5731 cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5735 cpu_gpr_d[r2], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5739 cpu_gpr_d[r2], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5742 gen_helper_max_b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5745 gen_helper_max_bu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5748 gen_helper_max_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5751 gen_helper_max_hu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5755 cpu_gpr_d[r2], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5759 cpu_gpr_d[r2], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5762 gen_helper_min_b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5765 gen_helper_min_bu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5768 gen_helper_min_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5771 gen_helper_min_hu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5774 tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r2]); in decode_rr_accumulator()
5782 tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r2]); in decode_rr_accumulator()
5791 tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r2]); in decode_rr_accumulator()
5792 tcg_gen_sari_tl(cpu_gpr_d[r3 + 1], cpu_gpr_d[r2], 31); in decode_rr_accumulator()
5799 cpu_gpr_d[r2]); in decode_rr_accumulator()
5803 cpu_gpr_d[r2], &tcg_gen_or_tl); in decode_rr_accumulator()
5807 cpu_gpr_d[r2], &tcg_gen_or_tl); in decode_rr_accumulator()
5811 cpu_gpr_d[r2], &tcg_gen_or_tl); in decode_rr_accumulator()
5815 cpu_gpr_d[r2], &tcg_gen_or_tl); in decode_rr_accumulator()
5819 cpu_gpr_d[r2], &tcg_gen_or_tl); in decode_rr_accumulator()
5823 cpu_gpr_d[r2], &tcg_gen_or_tl); in decode_rr_accumulator()
5839 cpu_gpr_d[r2]); in decode_rr_accumulator()
5843 cpu_gpr_d[r2]); in decode_rr_accumulator()
5847 cpu_gpr_d[r2]); in decode_rr_accumulator()
5851 cpu_gpr_d[r2]); in decode_rr_accumulator()
5855 cpu_gpr_d[r2]); in decode_rr_accumulator()
5859 cpu_gpr_d[r2]); in decode_rr_accumulator()
5862 gen_sub_d(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5865 gen_helper_sub_b(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5868 gen_helper_sub_h(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5871 gen_subc_CC(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5874 gen_subs(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5877 gen_subsu(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5881 cpu_gpr_d[r2]); in decode_rr_accumulator()
5885 cpu_gpr_d[r2]); in decode_rr_accumulator()
5888 gen_sub_CC(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_accumulator()
5892 cpu_gpr_d[r2], &tcg_gen_xor_tl); in decode_rr_accumulator()
5896 cpu_gpr_d[r2], &tcg_gen_xor_tl); in decode_rr_accumulator()
5900 cpu_gpr_d[r2], &tcg_gen_xor_tl); in decode_rr_accumulator()
5904 cpu_gpr_d[r2], &tcg_gen_xor_tl); in decode_rr_accumulator()
5908 cpu_gpr_d[r2], &tcg_gen_xor_tl); in decode_rr_accumulator()
5912 cpu_gpr_d[r2], &tcg_gen_xor_tl); in decode_rr_accumulator()
5922 int r3, r2, r1; in decode_rr_logical_shift() local
5925 r2 = MASK_OP_RR_S2(ctx->opcode); in decode_rr_logical_shift()
5931 tcg_gen_and_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5934 tcg_gen_andc_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5956 tcg_gen_nand_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5959 tcg_gen_nor_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5962 tcg_gen_or_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5965 tcg_gen_orc_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5968 gen_helper_sh(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5971 gen_helper_sh_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5974 gen_helper_sha(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5977 gen_helper_sha_h(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5980 gen_shas(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5983 tcg_gen_eqv_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5986 tcg_gen_xor_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_logical_shift()
5996 int r1, r2, r3; in decode_rr_address() local
6001 r2 = MASK_OP_RR_S2(ctx->opcode); in decode_rr_address()
6007 tcg_gen_add_tl(cpu_gpr_a[r3], cpu_gpr_a[r1], cpu_gpr_a[r2]); in decode_rr_address()
6012 tcg_gen_add_tl(cpu_gpr_a[r3], cpu_gpr_a[r2], temp); in decode_rr_address()
6017 tcg_gen_add_tl(temp, cpu_gpr_a[r2], temp); in decode_rr_address()
6022 cpu_gpr_a[r2]); in decode_rr_address()
6029 cpu_gpr_a[r2]); in decode_rr_address()
6033 cpu_gpr_a[r2]); in decode_rr_address()
6036 tcg_gen_mov_tl(cpu_gpr_a[r3], cpu_gpr_d[r2]); in decode_rr_address()
6039 tcg_gen_mov_tl(cpu_gpr_a[r3], cpu_gpr_a[r2]); in decode_rr_address()
6042 tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_a[r2]); in decode_rr_address()
6046 cpu_gpr_a[r2]); in decode_rr_address()
6052 tcg_gen_sub_tl(cpu_gpr_a[r3], cpu_gpr_a[r1], cpu_gpr_a[r2]); in decode_rr_address()
6093 int r1, r2, r3; in decode_rr_divide() local
6099 r2 = MASK_OP_RR_S2(ctx->opcode); in decode_rr_divide()
6104 gen_helper_bmerge(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_divide()
6113 cpu_gpr_d[r2]); in decode_rr_divide()
6124 /* overflow = (abs(D[r3+1]) >= abs(D[r2])) */ in decode_rr_divide()
6126 tcg_gen_abs_tl(temp2, cpu_gpr_d[r2]); in decode_rr_divide()
6130 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r2], 0); in decode_rr_divide()
6142 cpu_gpr_d[r2]); in decode_rr_divide()
6153 /* overflow = (abs(D[r3+1]) >= abs(D[r2])) */ in decode_rr_divide()
6155 tcg_gen_abs_tl(temp2, cpu_gpr_d[r2]); in decode_rr_divide()
6159 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r2], 0); in decode_rr_divide()
6174 tcg_gen_setcondi_tl(TCG_COND_EQ, temp, cpu_gpr_d[r2], 0xffffffff); in decode_rr_divide()
6177 tcg_gen_setcondi_tl(TCG_COND_EQ, temp2, cpu_gpr_d[r2], 0); in decode_rr_divide()
6192 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r2], 0); in decode_rr_divide()
6212 gen_helper_crc32b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_divide()
6219 gen_helper_crc32_be(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_divide()
6226 gen_helper_crc32_le(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_divide()
6243 cpu_gpr_d[r2]); in decode_rr_divide()
6252 cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_divide()
6258 gen_helper_fmul(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_divide()
6261 gen_helper_fdiv(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_divide()
6278 gen_helper_fcmp(cpu_gpr_d[r3], tcg_env, cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr_divide()
6318 int r1, r2, r3; in decode_rr1_mul() local
6323 r2 = MASK_OP_RR1_S2(ctx->opcode); in decode_rr1_mul()
6332 GEN_HELPER_LL(mul_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6339 GEN_HELPER_LU(mul_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6346 GEN_HELPER_UL(mul_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6353 GEN_HELPER_UU(mul_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6360 GEN_HELPER_LL(mulm_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6370 GEN_HELPER_LU(mulm_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6380 GEN_HELPER_UL(mulm_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6390 GEN_HELPER_UU(mulm_h, temp64, cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6398 GEN_HELPER_LL(mulr_h, cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6402 GEN_HELPER_LU(mulr_h, cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6406 GEN_HELPER_UL(mulr_h, cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6410 GEN_HELPER_UU(mulr_h, cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], n); in decode_rr1_mul()
6421 int r1, r2, r3; in decode_rr1_mulq() local
6427 r2 = MASK_OP_RR1_S2(ctx->opcode); in decode_rr1_mulq()
6437 gen_mul_q(cpu_gpr_d[r3], temp, cpu_gpr_d[r1], cpu_gpr_d[r2], n, 32); in decode_rr1_mulq()
6441 gen_mul_q(cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rr1_mulq()
6445 tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]); in decode_rr1_mulq()
6450 tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]); in decode_rr1_mulq()
6454 tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16); in decode_rr1_mulq()
6459 tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16); in decode_rr1_mulq()
6464 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rr1_mulq()
6469 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rr1_mulq()
6474 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rr1_mulq()
6479 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rr1_mulq()
6491 int r1, r2, r3; in decode_rr2_mul() local
6495 r2 = MASK_OP_RR2_S2(ctx->opcode); in decode_rr2_mul()
6499 gen_mul_i32s(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rr2_mul()
6504 cpu_gpr_d[r2]); in decode_rr2_mul()
6508 cpu_gpr_d[r2]); in decode_rr2_mul()
6513 cpu_gpr_d[r2]); in decode_rr2_mul()
6517 cpu_gpr_d[r2]); in decode_rr2_mul()
6528 int r1, r2, r3; in decode_rrpw_extract_insert() local
6534 r2 = MASK_OP_RRPW_S2(ctx->opcode); in decode_rrpw_extract_insert()
6560 tcg_gen_shli_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], pos); in decode_rrpw_extract_insert()
6570 tcg_gen_deposit_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrpw_extract_insert()
6583 int r1, r2, r3, r4; in decode_rrr_cond_select() local
6588 r2 = MASK_OP_RRR_S2(ctx->opcode); in decode_rrr_cond_select()
6594 gen_cond_add(TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr_cond_select()
6598 gen_cond_add(TCG_COND_EQ, cpu_gpr_d[r1], cpu_gpr_d[r2], cpu_gpr_d[r4], in decode_rrr_cond_select()
6602 gen_cond_sub(TCG_COND_NE, cpu_gpr_d[r1], cpu_gpr_d[r2], cpu_gpr_d[r4], in decode_rrr_cond_select()
6606 gen_cond_sub(TCG_COND_EQ, cpu_gpr_d[r1], cpu_gpr_d[r2], cpu_gpr_d[r4], in decode_rrr_cond_select()
6612 cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rrr_cond_select()
6617 cpu_gpr_d[r1], cpu_gpr_d[r2]); in decode_rrr_cond_select()
6628 int r1, r2, r3, r4; in decode_rrr_divide() local
6632 r2 = MASK_OP_RRR_S2(ctx->opcode); in decode_rrr_divide()
6641 cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr_divide()
6647 cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr_divide()
6653 cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr_divide()
6659 cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr_divide()
6665 cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr_divide()
6671 cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr_divide()
6677 cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr_divide()
6686 gen_helper_crcn(cpu_gpr_d[r4], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr_divide()
6700 cpu_gpr_d[r2], cpu_gpr_d[r3]); in decode_rrr_divide()
6704 cpu_gpr_d[r2], cpu_gpr_d[r3]); in decode_rrr_divide()
6715 uint32_t r1, r2, r3, r4; in decode_rrr2_madd() local
6719 r2 = MASK_OP_RRR2_S2(ctx->opcode); in decode_rrr2_madd()
6725 cpu_gpr_d[r2]); in decode_rrr2_madd()
6731 cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr2_madd()
6735 cpu_gpr_d[r3], cpu_gpr_d[r2]); in decode_rrr2_madd()
6741 cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr2_madd()
6747 cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr2_madd()
6751 cpu_gpr_d[r3], cpu_gpr_d[r2]); in decode_rrr2_madd()
6757 cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr2_madd()
6767 uint32_t r1, r2, r3, r4; in decode_rrr2_msub() local
6771 r2 = MASK_OP_RRR2_S2(ctx->opcode); in decode_rrr2_msub()
6778 cpu_gpr_d[r2]); in decode_rrr2_msub()
6784 cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr2_msub()
6788 cpu_gpr_d[r3], cpu_gpr_d[r2]); in decode_rrr2_msub()
6794 cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr2_msub()
6800 cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr2_msub()
6804 cpu_gpr_d[r3], cpu_gpr_d[r2]); in decode_rrr2_msub()
6810 cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r2]); in decode_rrr2_msub()
6821 uint32_t r1, r2, r3, r4, n; in decode_rrr1_madd() local
6825 r2 = MASK_OP_RRR1_S2(ctx->opcode); in decode_rrr1_madd()
6835 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_madd()
6841 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_madd()
6847 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_madd()
6853 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_madd()
6859 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_madd()
6865 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_madd()
6871 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_madd()
6877 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_madd()
6883 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_madd()
6889 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_madd()
6895 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_madd()
6901 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_madd()
6907 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_madd()
6913 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_madd()
6919 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_madd()
6925 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_madd()
6929 cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_madd()
6933 cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_madd()
6937 cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_madd()
6941 cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_madd()
6945 cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_madd()
6949 cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_madd()
6953 cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_madd()
6957 cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_madd()
6967 uint32_t r1, r2, r3, r4, n; in decode_rrr1_maddq_h() local
6972 r2 = MASK_OP_RRR1_S2(ctx->opcode); in decode_rrr1_maddq_h()
6983 cpu_gpr_d[r2], n, 32); in decode_rrr1_maddq_h()
6989 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddq_h()
6993 tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]); in decode_rrr1_maddq_h()
7000 tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]); in decode_rrr1_maddq_h()
7006 tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16); in decode_rrr1_maddq_h()
7013 tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16); in decode_rrr1_maddq_h()
7020 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_maddq_h()
7027 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_maddq_h()
7033 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_maddq_h()
7040 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_maddq_h()
7046 cpu_gpr_d[r2], n, 32); in decode_rrr1_maddq_h()
7052 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddq_h()
7056 tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]); in decode_rrr1_maddq_h()
7063 tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]); in decode_rrr1_maddq_h()
7069 tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16); in decode_rrr1_maddq_h()
7076 tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16); in decode_rrr1_maddq_h()
7083 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_maddq_h()
7090 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_maddq_h()
7096 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_maddq_h()
7103 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_maddq_h()
7110 cpu_gpr_d[r1], cpu_gpr_d[r2], n, 2); in decode_rrr1_maddq_h()
7115 cpu_gpr_d[r1], cpu_gpr_d[r2], n, 2); in decode_rrr1_maddq_h()
7119 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_maddq_h()
7124 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_maddq_h()
7129 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_maddq_h()
7134 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_maddq_h()
7145 uint32_t r1, r2, r3, r4, n; in decode_rrr1_maddsu_h() local
7149 r2 = MASK_OP_RRR1_S2(ctx->opcode); in decode_rrr1_maddsu_h()
7159 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_maddsu_h()
7165 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_maddsu_h()
7171 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_maddsu_h()
7177 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_maddsu_h()
7183 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7190 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7197 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7204 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7211 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7218 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7225 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7232 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7239 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7246 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7253 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7260 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_maddsu_h()
7265 cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_maddsu_h()
7269 cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_maddsu_h()
7273 cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_maddsu_h()
7277 cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_maddsu_h()
7281 cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_maddsu_h()
7285 cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_maddsu_h()
7289 cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_maddsu_h()
7293 cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_maddsu_h()
7303 uint32_t r1, r2, r3, r4, n; in decode_rrr1_msub() local
7307 r2 = MASK_OP_RRR1_S2(ctx->opcode); in decode_rrr1_msub()
7317 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_msub()
7323 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_msub()
7329 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_msub()
7335 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_msub()
7341 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_msub()
7347 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_msub()
7353 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_msub()
7359 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_msub()
7365 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_msub()
7371 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_msub()
7377 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_msub()
7383 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_msub()
7389 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_msub()
7395 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_msub()
7401 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_msub()
7407 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_msub()
7411 cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_msub()
7415 cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_msub()
7419 cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_msub()
7423 cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_msub()
7427 cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_msub()
7431 cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_msub()
7435 cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_msub()
7439 cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_msub()
7449 uint32_t r1, r2, r3, r4, n; in decode_rrr1_msubq_h() local
7454 r2 = MASK_OP_RRR1_S2(ctx->opcode); in decode_rrr1_msubq_h()
7465 cpu_gpr_d[r2], n, 32); in decode_rrr1_msubq_h()
7471 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubq_h()
7475 tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]); in decode_rrr1_msubq_h()
7482 tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]); in decode_rrr1_msubq_h()
7488 tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16); in decode_rrr1_msubq_h()
7495 tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16); in decode_rrr1_msubq_h()
7502 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_msubq_h()
7509 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_msubq_h()
7515 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_msubq_h()
7522 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_msubq_h()
7528 cpu_gpr_d[r2], n, 32); in decode_rrr1_msubq_h()
7534 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubq_h()
7538 tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]); in decode_rrr1_msubq_h()
7545 tcg_gen_ext16s_tl(temp, cpu_gpr_d[r2]); in decode_rrr1_msubq_h()
7551 tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16); in decode_rrr1_msubq_h()
7558 tcg_gen_sari_tl(temp, cpu_gpr_d[r2], 16); in decode_rrr1_msubq_h()
7565 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_msubq_h()
7572 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_msubq_h()
7578 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_msubq_h()
7585 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_msubq_h()
7592 cpu_gpr_d[r1], cpu_gpr_d[r2], n, 2); in decode_rrr1_msubq_h()
7597 cpu_gpr_d[r1], cpu_gpr_d[r2], n, 2); in decode_rrr1_msubq_h()
7601 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_msubq_h()
7606 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_msubq_h()
7611 tcg_gen_ext16s_tl(temp2, cpu_gpr_d[r2]); in decode_rrr1_msubq_h()
7616 tcg_gen_sari_tl(temp2, cpu_gpr_d[r2], 16); in decode_rrr1_msubq_h()
7627 uint32_t r1, r2, r3, r4, n; in decode_rrr1_msubad_h() local
7631 r2 = MASK_OP_RRR1_S2(ctx->opcode); in decode_rrr1_msubad_h()
7641 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_msubad_h()
7647 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_msubad_h()
7653 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_msubad_h()
7659 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_msubad_h()
7665 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7672 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7679 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7686 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7693 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7700 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7707 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7714 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7721 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7728 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7735 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7742 cpu_gpr_d[r3+1], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrr1_msubad_h()
7747 cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_msubad_h()
7751 cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_msubad_h()
7755 cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_msubad_h()
7759 cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_msubad_h()
7763 cpu_gpr_d[r2], n, MODE_LL); in decode_rrr1_msubad_h()
7767 cpu_gpr_d[r2], n, MODE_LU); in decode_rrr1_msubad_h()
7771 cpu_gpr_d[r2], n, MODE_UL); in decode_rrr1_msubad_h()
7775 cpu_gpr_d[r2], n, MODE_UU); in decode_rrr1_msubad_h()
7786 int r1, r2, r3, r4; in decode_rrrr_extract_insert() local
7790 r2 = MASK_OP_RRRR_S2(ctx->opcode); in decode_rrrr_extract_insert()
7801 if (r1 == r2) { in decode_rrrr_extract_insert()
7808 tcg_gen_shr_tl(msw, cpu_gpr_d[r2], msw); in decode_rrrr_extract_insert()
7810 * if pos == 0, then we do cpu_gpr_d[r2] << 32, which is undefined in decode_rrrr_extract_insert()
7837 gen_insert(cpu_gpr_d[r4], cpu_gpr_d[r1], cpu_gpr_d[r2], tmp_width, in decode_rrrr_extract_insert()
7849 int r1, r2, r3, r4; in decode_rrrw_extract_insert() local
7856 r2 = MASK_OP_RRRW_S2(ctx->opcode); in decode_rrrw_extract_insert()
7886 tcg_gen_shl_tl(cpu_gpr_d[r4], cpu_gpr_d[r2], temp); in decode_rrrw_extract_insert()
7894 gen_insert(cpu_gpr_d[r4], cpu_gpr_d[r1], cpu_gpr_d[r2], temp, temp2); in decode_rrrw_extract_insert()
8013 int32_t r1, r2, r3; in decode_32Bit_opc() local
8184 r2 = MASK_OP_BRR_S2(ctx->opcode); in decode_32Bit_opc()
8186 gen_compute_branch(ctx, op1, r1, r2, 0, address); in decode_32Bit_opc()
8208 r2 = MASK_OP_RCRR_S3(ctx->opcode); in decode_32Bit_opc()
8215 CHECK_REG_PAIR(r2); in decode_32Bit_opc()
8217 tcg_gen_andi_tl(temp2, cpu_gpr_d[r2 + 1], 0x1f); in decode_32Bit_opc()
8218 tcg_gen_andi_tl(temp3, cpu_gpr_d[r2], 0x1f); in decode_32Bit_opc()
8282 r2 = MASK_OP_RRPW_S2(ctx->opcode); in decode_32Bit_opc()
8286 tcg_gen_extract2_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_32Bit_opc()