Lines Matching full:dc
212 static void gen_update_fprs_dirty(DisasContext *dc, int rd) in gen_update_fprs_dirty() argument
218 if (!(dc->fprs_dirty & bit)) { in gen_update_fprs_dirty()
219 dc->fprs_dirty |= bit; in gen_update_fprs_dirty()
241 static TCGv_i32 gen_load_fpr_F(DisasContext *dc, unsigned int src) in gen_load_fpr_F() argument
248 static void gen_store_fpr_F(DisasContext *dc, unsigned int dst, TCGv_i32 v) in gen_store_fpr_F() argument
251 gen_update_fprs_dirty(dc, dst); in gen_store_fpr_F()
261 static TCGv_i64 gen_load_fpr_D(DisasContext *dc, unsigned int src) in gen_load_fpr_D() argument
268 static void gen_store_fpr_D(DisasContext *dc, unsigned int dst, TCGv_i64 v) in gen_store_fpr_D() argument
271 gen_update_fprs_dirty(dc, dst); in gen_store_fpr_D()
274 static TCGv_i128 gen_load_fpr_Q(DisasContext *dc, unsigned int src) in gen_load_fpr_Q() argument
277 TCGv_i64 h = gen_load_fpr_D(dc, src); in gen_load_fpr_Q()
278 TCGv_i64 l = gen_load_fpr_D(dc, src + 2); in gen_load_fpr_Q()
284 static void gen_store_fpr_Q(DisasContext *dc, unsigned int dst, TCGv_i128 v) in gen_store_fpr_Q() argument
290 gen_store_fpr_D(dc, dst, h); in gen_store_fpr_Q()
291 gen_store_fpr_D(dc, dst + 2, l); in gen_store_fpr_Q()
296 #define supervisor(dc) 0 argument
297 #define hypervisor(dc) 0 argument
300 #define hypervisor(dc) (dc->hypervisor) argument
301 #define supervisor(dc) (dc->supervisor | dc->hypervisor) argument
303 #define supervisor(dc) (dc->supervisor) argument
304 #define hypervisor(dc) 0 argument
309 # define AM_CHECK(dc) false argument
311 # define AM_CHECK(dc) true argument
313 # define AM_CHECK(dc) false argument
315 # define AM_CHECK(dc) ((dc)->address_mask_32bit) argument
318 static void gen_address_mask(DisasContext *dc, TCGv addr) in gen_address_mask() argument
320 if (AM_CHECK(dc)) { in gen_address_mask()
325 static target_ulong address_mask_i(DisasContext *dc, target_ulong addr) in address_mask_i() argument
327 return AM_CHECK(dc) ? (uint32_t)addr : addr; in address_mask_i()
330 static TCGv gen_load_gpr(DisasContext *dc, int reg) in gen_load_gpr() argument
342 static void gen_store_gpr(DisasContext *dc, int reg, TCGv v) in gen_store_gpr() argument
350 static TCGv gen_dest_gpr(DisasContext *dc, int reg) in gen_dest_gpr() argument
991 static void finishing_insn(DisasContext *dc) in finishing_insn() argument
998 if (dc->cpu_cond_live) { in finishing_insn()
1000 dc->cpu_cond_live = false; in finishing_insn()
1004 static void gen_generic_branch(DisasContext *dc) in gen_generic_branch() argument
1006 TCGv npc0 = tcg_constant_tl(dc->jump_pc[0]); in gen_generic_branch()
1007 TCGv npc1 = tcg_constant_tl(dc->jump_pc[1]); in gen_generic_branch()
1008 TCGv c2 = tcg_constant_tl(dc->jump.c2); in gen_generic_branch()
1010 tcg_gen_movcond_tl(dc->jump.cond, cpu_npc, dc->jump.c1, c2, npc0, npc1); in gen_generic_branch()
1015 static void flush_cond(DisasContext *dc) in flush_cond() argument
1017 if (dc->npc == JUMP_PC) { in flush_cond()
1018 gen_generic_branch(dc); in flush_cond()
1019 dc->npc = DYNAMIC_PC_LOOKUP; in flush_cond()
1023 static void save_npc(DisasContext *dc) in save_npc() argument
1025 if (dc->npc & 3) { in save_npc()
1026 switch (dc->npc) { in save_npc()
1028 gen_generic_branch(dc); in save_npc()
1029 dc->npc = DYNAMIC_PC_LOOKUP; in save_npc()
1038 tcg_gen_movi_tl(cpu_npc, dc->npc); in save_npc()
1042 static void save_state(DisasContext *dc) in save_state() argument
1044 tcg_gen_movi_tl(cpu_pc, dc->pc); in save_state()
1045 save_npc(dc); in save_state()
1048 static void gen_exception(DisasContext *dc, int which) in gen_exception() argument
1050 finishing_insn(dc); in gen_exception()
1051 save_state(dc); in gen_exception()
1053 dc->base.is_jmp = DISAS_NORETURN; in gen_exception()
1056 static TCGLabel *delay_exceptionv(DisasContext *dc, TCGv_i32 excp) in delay_exceptionv() argument
1060 e->next = dc->delay_excp_list; in delay_exceptionv()
1061 dc->delay_excp_list = e; in delay_exceptionv()
1065 e->pc = dc->pc; in delay_exceptionv()
1068 e->npc = dc->npc; in delay_exceptionv()
1073 static TCGLabel *delay_exception(DisasContext *dc, int excp) in delay_exception() argument
1075 return delay_exceptionv(dc, tcg_constant_i32(excp)); in delay_exception()
1078 static void gen_check_align(DisasContext *dc, TCGv addr, int mask) in gen_check_align() argument
1085 flush_cond(dc); in gen_check_align()
1086 lab = delay_exception(dc, TT_UNALIGNED); in gen_check_align()
1090 static void gen_mov_pc_npc(DisasContext *dc) in gen_mov_pc_npc() argument
1092 finishing_insn(dc); in gen_mov_pc_npc()
1094 if (dc->npc & 3) { in gen_mov_pc_npc()
1095 switch (dc->npc) { in gen_mov_pc_npc()
1097 gen_generic_branch(dc); in gen_mov_pc_npc()
1099 dc->pc = DYNAMIC_PC_LOOKUP; in gen_mov_pc_npc()
1104 dc->pc = dc->npc; in gen_mov_pc_npc()
1110 dc->pc = dc->npc; in gen_mov_pc_npc()
1115 DisasContext *dc) in gen_compare() argument
1467 static void gen_op_fpexception_im(DisasContext *dc, int ftt) in gen_op_fpexception_im() argument
1476 gen_exception(dc, TT_FP_EXCP); in gen_op_fpexception_im()
1479 static bool gen_trap_ifnofpu(DisasContext *dc) in gen_trap_ifnofpu() argument
1482 if (!dc->fpu_enabled) { in gen_trap_ifnofpu()
1483 gen_exception(dc, TT_NFPU_INSN); in gen_trap_ifnofpu()
1490 static bool gen_trap_iffpexception(DisasContext *dc) in gen_trap_iffpexception() argument
1510 if (dc->fsr_qne) { in gen_trap_iffpexception()
1511 gen_op_fpexception_im(dc, FSR_FTT_SEQ_ERROR); in gen_trap_iffpexception()
1518 static bool gen_trap_if_nofpu_fpexception(DisasContext *dc) in gen_trap_if_nofpu_fpexception() argument
1520 return gen_trap_ifnofpu(dc) || gen_trap_iffpexception(dc); in gen_trap_if_nofpu_fpexception()
1548 static DisasASI resolve_asi(DisasContext *dc, int asi, MemOp memop) in resolve_asi() argument
1551 int mem_idx = dc->mem_idx; in resolve_asi()
1562 gen_exception(dc, TT_ILL_INSN); in resolve_asi()
1564 } else if (supervisor(dc) in resolve_asi()
1570 && (dc->def->features & CPU_FEATURE_CASA))) { in resolve_asi()
1606 mem_idx = (dc->mem_idx == MMU_PHYS_IDX) ? MMU_PHYS_IDX : mem_idx; in resolve_asi()
1608 gen_exception(dc, TT_PRIV_INSN); in resolve_asi()
1613 asi = dc->asi; in resolve_asi()
1621 if (!supervisor(dc) && asi < 0x80) { in resolve_asi()
1622 gen_exception(dc, TT_PRIV_ACT); in resolve_asi()
1642 if (hypervisor(dc)) { in resolve_asi()
1797 static void gen_ld_asi(DisasContext *dc, DisasASI *da, TCGv dst, TCGv addr) in gen_ld_asi() argument
1803 gen_exception(dc, TT_ILL_INSN); in gen_ld_asi()
1828 save_state(dc); in gen_ld_asi()
1843 static void gen_st_asi(DisasContext *dc, DisasASI *da, TCGv src, TCGv addr) in gen_st_asi() argument
1851 gen_exception(dc, TT_ILL_INSN); in gen_st_asi()
1853 } else if (!(dc->def->features & CPU_FEATURE_HYPV)) { in gen_st_asi()
1855 gen_exception(dc, TT_ILL_INSN); in gen_st_asi()
1904 save_state(dc); in gen_st_asi()
1916 dc->npc = DYNAMIC_PC; in gen_st_asi()
1922 static void gen_swap_asi(DisasContext *dc, DisasASI *da, in gen_swap_asi() argument
1934 gen_exception(dc, TT_DATA_ACCESS); in gen_swap_asi()
1939 static void gen_cas_asi(DisasContext *dc, DisasASI *da, in gen_cas_asi() argument
1951 gen_exception(dc, TT_DATA_ACCESS); in gen_cas_asi()
1956 static void gen_ldstub_asi(DisasContext *dc, DisasASI *da, TCGv dst, TCGv addr) in gen_ldstub_asi() argument
1968 if (tb_cflags(dc->base.tb) & CF_PARALLEL) { in gen_ldstub_asi()
1975 save_state(dc); in gen_ldstub_asi()
1985 dc->npc = DYNAMIC_PC; in gen_ldstub_asi()
1991 static void gen_ldf_asi(DisasContext *dc, DisasASI *da, MemOp orig_size, in gen_ldf_asi() argument
2015 gen_store_fpr_F(dc, rd, d32); in gen_ldf_asi()
2021 gen_store_fpr_D(dc, rd, d64); in gen_ldf_asi()
2031 gen_store_fpr_D(dc, rd, d64); in gen_ldf_asi()
2032 gen_store_fpr_D(dc, rd + 2, l64); in gen_ldf_asi()
2048 gen_store_fpr_D(dc, rd + 2 * i, d64); in gen_ldf_asi()
2056 gen_exception(dc, TT_ILL_INSN); in gen_ldf_asi()
2065 gen_store_fpr_D(dc, rd, d64); in gen_ldf_asi()
2067 gen_exception(dc, TT_ILL_INSN); in gen_ldf_asi()
2076 save_state(dc); in gen_ldf_asi()
2087 gen_store_fpr_F(dc, rd, d32); in gen_ldf_asi()
2092 gen_store_fpr_D(dc, rd, d64); in gen_ldf_asi()
2101 gen_store_fpr_D(dc, rd, d64); in gen_ldf_asi()
2102 gen_store_fpr_D(dc, rd + 2, l64); in gen_ldf_asi()
2112 static void gen_stf_asi(DisasContext *dc, DisasASI *da, MemOp orig_size, in gen_stf_asi() argument
2134 d32 = gen_load_fpr_F(dc, rd); in gen_stf_asi()
2138 d64 = gen_load_fpr_D(dc, rd); in gen_stf_asi()
2147 d64 = gen_load_fpr_D(dc, rd); in gen_stf_asi()
2151 d64 = gen_load_fpr_D(dc, rd + 2); in gen_stf_asi()
2165 d64 = gen_load_fpr_D(dc, rd + 2 * i); in gen_stf_asi()
2175 gen_exception(dc, TT_ILL_INSN); in gen_stf_asi()
2182 d64 = gen_load_fpr_D(dc, rd); in gen_stf_asi()
2185 gen_exception(dc, TT_ILL_INSN); in gen_stf_asi()
2193 gen_exception(dc, TT_ILL_INSN); in gen_stf_asi()
2198 static void gen_ldda_asi(DisasContext *dc, DisasASI *da, TCGv addr, int rd) in gen_ldda_asi() argument
2200 TCGv hi = gen_dest_gpr(dc, rd); in gen_ldda_asi()
2201 TCGv lo = gen_dest_gpr(dc, rd + 1); in gen_ldda_asi()
2277 save_state(dc); in gen_ldda_asi()
2290 gen_store_gpr(dc, rd, hi); in gen_ldda_asi()
2291 gen_store_gpr(dc, rd + 1, lo); in gen_ldda_asi()
2294 static void gen_stda_asi(DisasContext *dc, DisasASI *da, TCGv addr, int rd) in gen_stda_asi() argument
2296 TCGv hi = gen_load_gpr(dc, rd); in gen_stda_asi()
2297 TCGv lo = gen_load_gpr(dc, rd + 1); in gen_stda_asi()
2378 save_state(dc); in gen_stda_asi()
2385 static void gen_fmovs(DisasContext *dc, DisasCompare *cmp, int rd, int rs) in gen_fmovs() argument
2398 s1 = gen_load_fpr_F(dc, rs); in gen_fmovs()
2399 s2 = gen_load_fpr_F(dc, rd); in gen_fmovs()
2405 gen_store_fpr_F(dc, rd, dst); in gen_fmovs()
2411 static void gen_fmovd(DisasContext *dc, DisasCompare *cmp, int rd, int rs) in gen_fmovd() argument
2416 gen_load_fpr_D(dc, rs), in gen_fmovd()
2417 gen_load_fpr_D(dc, rd)); in gen_fmovd()
2418 gen_store_fpr_D(dc, rd, dst); in gen_fmovd()
2424 static void gen_fmovq(DisasContext *dc, DisasCompare *cmp, int rd, int rs) in gen_fmovq() argument
2432 gen_load_fpr_D(dc, rs), in gen_fmovq()
2433 gen_load_fpr_D(dc, rd)); in gen_fmovq()
2435 gen_load_fpr_D(dc, rs + 2), in gen_fmovq()
2436 gen_load_fpr_D(dc, rd + 2)); in gen_fmovq()
2437 gen_store_fpr_D(dc, rd, h); in gen_fmovq()
2438 gen_store_fpr_D(dc, rd + 2, l); in gen_fmovq()
2468 static int extract_dfpreg(DisasContext *dc, int x) in extract_dfpreg() argument
2477 static int extract_qfpreg(DisasContext *dc, int x) in extract_qfpreg() argument
2490 static bool trans_##NAME(DisasContext *dc, arg_##NAME *a) \
2491 { return avail_##AVAIL(dc) && FUNC(dc, __VA_ARGS__); }
2531 static bool advance_pc(DisasContext *dc) in advance_pc() argument
2535 finishing_insn(dc); in advance_pc()
2537 if (dc->npc & 3) { in advance_pc()
2538 switch (dc->npc) { in advance_pc()
2541 dc->pc = dc->npc; in advance_pc()
2549 tcg_gen_brcondi_tl(dc->jump.cond, dc->jump.c1, dc->jump.c2, l1); in advance_pc()
2552 gen_goto_tb(dc, 1, dc->jump_pc[1], dc->jump_pc[1] + 4); in advance_pc()
2556 gen_goto_tb(dc, 0, dc->jump_pc[0], dc->jump_pc[0] + 4); in advance_pc()
2558 dc->base.is_jmp = DISAS_NORETURN; in advance_pc()
2565 dc->pc = dc->npc; in advance_pc()
2566 dc->npc = dc->npc + 4; in advance_pc()
2575 static bool advance_jump_cond(DisasContext *dc, DisasCompare *cmp, in advance_jump_cond() argument
2578 target_ulong dest = address_mask_i(dc, dc->pc + disp * 4); in advance_jump_cond()
2581 finishing_insn(dc); in advance_jump_cond()
2585 dc->pc = dest; in advance_jump_cond()
2586 dc->npc = dest + 4; in advance_jump_cond()
2588 gen_mov_pc_npc(dc); in advance_jump_cond()
2589 dc->npc = dest; in advance_jump_cond()
2595 npc = dc->npc; in advance_jump_cond()
2597 gen_mov_pc_npc(dc); in advance_jump_cond()
2603 dc->pc = npc + (annul ? 4 : 0); in advance_jump_cond()
2604 dc->npc = dc->pc + 4; in advance_jump_cond()
2609 flush_cond(dc); in advance_jump_cond()
2610 npc = dc->npc; in advance_jump_cond()
2616 gen_goto_tb(dc, 0, npc, dest); in advance_jump_cond()
2618 gen_goto_tb(dc, 1, npc + 4, npc + 8); in advance_jump_cond()
2620 dc->base.is_jmp = DISAS_NORETURN; in advance_jump_cond()
2631 dc->pc = npc; in advance_jump_cond()
2637 dc->pc = npc; in advance_jump_cond()
2638 dc->npc = JUMP_PC; in advance_jump_cond()
2639 dc->jump = *cmp; in advance_jump_cond()
2640 dc->jump_pc[0] = dest; in advance_jump_cond()
2641 dc->jump_pc[1] = npc + 4; in advance_jump_cond()
2649 dc->cpu_cond_live = true; in advance_jump_cond()
2655 static bool raise_priv(DisasContext *dc) in raise_priv() argument
2657 gen_exception(dc, TT_PRIV_INSN); in raise_priv()
2661 static bool raise_unimpfpop(DisasContext *dc) in raise_unimpfpop() argument
2663 gen_op_fpexception_im(dc, FSR_FTT_UNIMPFPOP); in raise_unimpfpop()
2667 static bool gen_trap_float128(DisasContext *dc) in gen_trap_float128() argument
2669 if (dc->def->features & CPU_FEATURE_FLOAT128) { in gen_trap_float128()
2672 return raise_unimpfpop(dc); in gen_trap_float128()
2675 static bool do_bpcc(DisasContext *dc, arg_bcc *a) in do_bpcc() argument
2679 gen_compare(&cmp, a->cc, a->cond, dc); in do_bpcc()
2680 return advance_jump_cond(dc, &cmp, a->a, a->i); in do_bpcc()
2686 static bool do_fbpfcc(DisasContext *dc, arg_bcc *a) in TRANS()
2690 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
2694 return advance_jump_cond(dc, &cmp, a->a, a->i); in TRANS()
2700 static bool trans_BPr(DisasContext *dc, arg_BPr *a) in TRANS()
2704 if (!avail_64(dc)) { in TRANS()
2707 if (!gen_compare_reg(&cmp, a->cond, gen_load_gpr(dc, a->rs1))) { in TRANS()
2710 return advance_jump_cond(dc, &cmp, a->a, a->i); in TRANS()
2713 static bool trans_CALL(DisasContext *dc, arg_CALL *a) in trans_CALL() argument
2715 target_long target = address_mask_i(dc, dc->pc + a->i * 4); in trans_CALL()
2717 gen_store_gpr(dc, 15, tcg_constant_tl(dc->pc)); in trans_CALL()
2718 gen_mov_pc_npc(dc); in trans_CALL()
2719 dc->npc = target; in trans_CALL()
2723 static bool trans_NCP(DisasContext *dc, arg_NCP *a) in trans_NCP() argument
2732 gen_exception(dc, TT_NCP_INSN); in trans_NCP()
2737 static bool trans_SETHI(DisasContext *dc, arg_SETHI *a) in trans_SETHI() argument
2741 gen_store_gpr(dc, a->rd, tcg_constant_tl((uint32_t)a->i << 10)); in trans_SETHI()
2743 return advance_pc(dc); in trans_SETHI()
2750 static bool do_tcc(DisasContext *dc, int cond, int cc, in do_tcc() argument
2753 int mask = ((dc->def->features & CPU_FEATURE_HYPV) && supervisor(dc) in do_tcc()
2761 return advance_pc(dc); in do_tcc()
2772 tcg_gen_trunc_tl_i32(trap, gen_load_gpr(dc, rs1)); in do_tcc()
2777 tcg_gen_trunc_tl_i32(t2, gen_load_gpr(dc, rs2_or_imm)); in do_tcc()
2784 finishing_insn(dc); in do_tcc()
2788 save_state(dc); in do_tcc()
2790 dc->base.is_jmp = DISAS_NORETURN; in do_tcc()
2795 flush_cond(dc); in do_tcc()
2796 lab = delay_exceptionv(dc, trap); in do_tcc()
2797 gen_compare(&cmp, cc, cond, dc); in do_tcc()
2800 return advance_pc(dc); in do_tcc()
2803 static bool trans_Tcc_r(DisasContext *dc, arg_Tcc_r *a) in trans_Tcc_r() argument
2805 if (avail_32(dc) && a->cc) { in trans_Tcc_r()
2808 return do_tcc(dc, a->cond, a->cc, a->rs1, false, a->rs2); in trans_Tcc_r()
2811 static bool trans_Tcc_i_v7(DisasContext *dc, arg_Tcc_i_v7 *a) in trans_Tcc_i_v7() argument
2813 if (avail_64(dc)) { in trans_Tcc_i_v7()
2816 return do_tcc(dc, a->cond, 0, a->rs1, true, a->i); in trans_Tcc_i_v7()
2819 static bool trans_Tcc_i_v9(DisasContext *dc, arg_Tcc_i_v9 *a) in trans_Tcc_i_v9() argument
2821 if (avail_32(dc)) { in trans_Tcc_i_v9()
2824 return do_tcc(dc, a->cond, a->cc, a->rs1, true, a->i); in trans_Tcc_i_v9()
2827 static bool trans_STBAR(DisasContext *dc, arg_STBAR *a) in trans_STBAR() argument
2830 return advance_pc(dc); in trans_STBAR()
2833 static bool trans_MEMBAR(DisasContext *dc, arg_MEMBAR *a) in trans_MEMBAR() argument
2835 if (avail_32(dc)) { in trans_MEMBAR()
2844 dc->base.is_jmp = DISAS_EXIT; in trans_MEMBAR()
2846 return advance_pc(dc); in trans_MEMBAR()
2849 static bool do_rd_special(DisasContext *dc, bool priv, int rd, in do_rd_special() argument
2853 return raise_priv(dc); in do_rd_special()
2855 gen_store_gpr(dc, rd, func(dc, gen_dest_gpr(dc, rd))); in do_rd_special()
2856 return advance_pc(dc); in do_rd_special()
2859 static TCGv do_rdy(DisasContext *dc, TCGv dst) in do_rdy() argument
2864 static bool trans_RDY(DisasContext *dc, arg_RDY *a) in trans_RDY() argument
2871 if (avail_64(dc) && a->rs1 != 0) { in trans_RDY()
2874 return do_rd_special(dc, true, a->rd, do_rdy); in trans_RDY()
2877 static TCGv do_rd_leon3_config(DisasContext *dc, TCGv dst) in do_rd_leon3_config() argument
2885 static TCGv do_rdpic(DisasContext *dc, TCGv dst) in do_rdpic() argument
2890 TRANS(RDPIC, HYPV, do_rd_special, supervisor(dc), a->rd, do_rdpic)
2893 static TCGv do_rdccr(DisasContext *dc, TCGv dst) in do_rdccr() argument
2901 static TCGv do_rdasi(DisasContext *dc, TCGv dst) in do_rdasi() argument
2904 return tcg_constant_tl(dc->asi); in do_rdasi()
2912 static TCGv do_rdtick(DisasContext *dc, TCGv dst) in do_rdtick() argument
2917 if (translator_io_start(&dc->base)) { in do_rdtick()
2918 dc->base.is_jmp = DISAS_EXIT; in do_rdtick()
2921 tcg_constant_i32(dc->mem_idx)); in do_rdtick()
2928 static TCGv do_rdpc(DisasContext *dc, TCGv dst) in do_rdpc() argument
2930 return tcg_constant_tl(address_mask_i(dc, dc->pc)); in do_rdpc()
2935 static TCGv do_rdfprs(DisasContext *dc, TCGv dst) in do_rdfprs() argument
2943 static TCGv do_rdgsr(DisasContext *dc, TCGv dst) in do_rdgsr() argument
2945 gen_trap_ifnofpu(dc); in do_rdgsr()
2951 static TCGv do_rdsoftint(DisasContext *dc, TCGv dst) in do_rdsoftint() argument
2957 TRANS(RDSOFTINT, 64, do_rd_special, supervisor(dc), a->rd, do_rdsoftint)
2959 static TCGv do_rdtick_cmpr(DisasContext *dc, TCGv dst) in do_rdtick_cmpr() argument
2968 static TCGv do_rdstick(DisasContext *dc, TCGv dst) in do_rdstick() argument
2973 if (translator_io_start(&dc->base)) { in do_rdstick()
2974 dc->base.is_jmp = DISAS_EXIT; in do_rdstick()
2977 tcg_constant_i32(dc->mem_idx)); in do_rdstick()
2984 static TCGv do_rdstick_cmpr(DisasContext *dc, TCGv dst) in do_rdstick_cmpr() argument
2991 TRANS(RDSTICK_CMPR, 64, do_rd_special, supervisor(dc), a->rd, do_rdstick_cmpr)
2998 static TCGv do_rdstrand_status(DisasContext *dc, TCGv dst) in do_rdstrand_status() argument
3005 static TCGv do_rdpsr(DisasContext *dc, TCGv dst) in do_rdpsr() argument
3011 TRANS(RDPSR, 32, do_rd_special, supervisor(dc), a->rd, do_rdpsr)
3013 static TCGv do_rdhpstate(DisasContext *dc, TCGv dst) in do_rdhpstate() argument
3019 TRANS(RDHPR_hpstate, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdhpstate)
3021 static TCGv do_rdhtstate(DisasContext *dc, TCGv dst) in do_rdhtstate() argument
3036 TRANS(RDHPR_htstate, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdhtstate)
3038 static TCGv do_rdhintp(DisasContext *dc, TCGv dst) in do_rdhintp() argument
3044 TRANS(RDHPR_hintp, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdhintp)
3046 static TCGv do_rdhtba(DisasContext *dc, TCGv dst) in do_rdhtba() argument
3052 TRANS(RDHPR_htba, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdhtba)
3054 static TCGv do_rdhver(DisasContext *dc, TCGv dst) in do_rdhver() argument
3060 TRANS(RDHPR_hver, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdhver)
3062 static TCGv do_rdhstick_cmpr(DisasContext *dc, TCGv dst) in do_rdhstick_cmpr() argument
3068 TRANS(RDHPR_hstick_cmpr, HYPV, do_rd_special, hypervisor(dc), a->rd,
3071 static TCGv do_rdwim(DisasContext *dc, TCGv dst) in do_rdwim() argument
3077 TRANS(RDWIM, 32, do_rd_special, supervisor(dc), a->rd, do_rdwim)
3079 static TCGv do_rdtpc(DisasContext *dc, TCGv dst) in do_rdtpc() argument
3092 TRANS(RDPR_tpc, 64, do_rd_special, supervisor(dc), a->rd, do_rdtpc)
3094 static TCGv do_rdtnpc(DisasContext *dc, TCGv dst) in do_rdtnpc() argument
3107 TRANS(RDPR_tnpc, 64, do_rd_special, supervisor(dc), a->rd, do_rdtnpc)
3109 static TCGv do_rdtstate(DisasContext *dc, TCGv dst) in do_rdtstate() argument
3122 TRANS(RDPR_tstate, 64, do_rd_special, supervisor(dc), a->rd, do_rdtstate)
3124 static TCGv do_rdtt(DisasContext *dc, TCGv dst) in do_rdtt() argument
3137 TRANS(RDPR_tt, 64, do_rd_special, supervisor(dc), a->rd, do_rdtt)
3138 TRANS(RDPR_tick, 64, do_rd_special, supervisor(dc), a->rd, do_rdtick)
3140 static TCGv do_rdtba(DisasContext *dc, TCGv dst) in do_rdtba() argument
3145 TRANS(RDTBR, 32, do_rd_special, supervisor(dc), a->rd, do_rdtba)
3146 TRANS(RDPR_tba, 64, do_rd_special, supervisor(dc), a->rd, do_rdtba)
3148 static TCGv do_rdpstate(DisasContext *dc, TCGv dst) in do_rdpstate() argument
3154 TRANS(RDPR_pstate, 64, do_rd_special, supervisor(dc), a->rd, do_rdpstate)
3156 static TCGv do_rdtl(DisasContext *dc, TCGv dst) in do_rdtl() argument
3162 TRANS(RDPR_tl, 64, do_rd_special, supervisor(dc), a->rd, do_rdtl)
3164 static TCGv do_rdpil(DisasContext *dc, TCGv dst) in do_rdpil() argument
3170 TRANS(RDPR_pil, 64, do_rd_special, supervisor(dc), a->rd, do_rdpil)
3172 static TCGv do_rdcwp(DisasContext *dc, TCGv dst) in do_rdcwp() argument
3178 TRANS(RDPR_cwp, 64, do_rd_special, supervisor(dc), a->rd, do_rdcwp)
3180 static TCGv do_rdcansave(DisasContext *dc, TCGv dst) in do_rdcansave() argument
3186 TRANS(RDPR_cansave, 64, do_rd_special, supervisor(dc), a->rd, do_rdcansave)
3188 static TCGv do_rdcanrestore(DisasContext *dc, TCGv dst) in do_rdcanrestore() argument
3194 TRANS(RDPR_canrestore, 64, do_rd_special, supervisor(dc), a->rd,
3197 static TCGv do_rdcleanwin(DisasContext *dc, TCGv dst) in do_rdcleanwin() argument
3203 TRANS(RDPR_cleanwin, 64, do_rd_special, supervisor(dc), a->rd, do_rdcleanwin)
3205 static TCGv do_rdotherwin(DisasContext *dc, TCGv dst) in do_rdotherwin() argument
3211 TRANS(RDPR_otherwin, 64, do_rd_special, supervisor(dc), a->rd, do_rdotherwin)
3213 static TCGv do_rdwstate(DisasContext *dc, TCGv dst) in do_rdwstate() argument
3219 TRANS(RDPR_wstate, 64, do_rd_special, supervisor(dc), a->rd, do_rdwstate)
3221 static TCGv do_rdgl(DisasContext *dc, TCGv dst) in do_rdgl() argument
3227 TRANS(RDPR_gl, GL, do_rd_special, supervisor(dc), a->rd, do_rdgl)
3230 static TCGv do_rdssr(DisasContext *dc, TCGv dst) in do_rdssr() argument
3236 TRANS(RDPR_strand_status, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdssr)
3238 static TCGv do_rdver(DisasContext *dc, TCGv dst) in do_rdver() argument
3244 TRANS(RDPR_ver, 64, do_rd_special, supervisor(dc), a->rd, do_rdver)
3246 static bool trans_FLUSHW(DisasContext *dc, arg_FLUSHW *a) in trans_FLUSHW() argument
3248 if (avail_64(dc)) { in trans_FLUSHW()
3250 return advance_pc(dc); in trans_FLUSHW()
3255 static bool do_wr_special(DisasContext *dc, arg_r_r_ri *a, bool priv, in do_wr_special() argument
3265 return raise_priv(dc); in do_wr_special()
3271 TCGv src1 = gen_load_gpr(dc, a->rs1); in do_wr_special()
3279 tcg_gen_xor_tl(src, src1, gen_load_gpr(dc, a->rs2_or_imm)); in do_wr_special()
3283 func(dc, src); in do_wr_special()
3284 return advance_pc(dc); in do_wr_special()
3287 static void do_wry(DisasContext *dc, TCGv src) in do_wry() argument
3294 static void do_wrccr(DisasContext *dc, TCGv src) in TRANS()
3301 static void do_wrasi(DisasContext *dc, TCGv src) in do_wrasi() argument
3308 dc->base.is_jmp = DISAS_EXIT; in do_wrasi()
3313 static void do_wrfprs(DisasContext *dc, TCGv src) in do_wrfprs() argument
3317 dc->fprs_dirty = 0; in do_wrfprs()
3318 dc->base.is_jmp = DISAS_EXIT; in do_wrfprs()
3326 static bool do_priv_nop(DisasContext *dc, bool priv) in do_priv_nop() argument
3329 return raise_priv(dc); in do_priv_nop()
3331 return advance_pc(dc); in do_priv_nop()
3334 TRANS(WRPCR, HYPV, do_priv_nop, supervisor(dc)) in TRANS() argument
3335 TRANS(WRPIC, HYPV, do_priv_nop, supervisor(dc)) in TRANS()
3337 static void do_wrgsr(DisasContext *dc, TCGv src) in TRANS()
3339 gen_trap_ifnofpu(dc); in TRANS()
3345 static void do_wrsoftint_set(DisasContext *dc, TCGv src) in do_wrsoftint_set() argument
3350 TRANS(WRSOFTINT_SET, 64, do_wr_special, a, supervisor(dc), do_wrsoftint_set)
3352 static void do_wrsoftint_clr(DisasContext *dc, TCGv src) in do_wrsoftint_clr() argument
3357 TRANS(WRSOFTINT_CLR, 64, do_wr_special, a, supervisor(dc), do_wrsoftint_clr)
3359 static void do_wrsoftint(DisasContext *dc, TCGv src) in do_wrsoftint() argument
3364 TRANS(WRSOFTINT, 64, do_wr_special, a, supervisor(dc), do_wrsoftint)
3366 static void do_wrtick_cmpr(DisasContext *dc, TCGv src) in do_wrtick_cmpr() argument
3372 translator_io_start(&dc->base); in do_wrtick_cmpr()
3375 dc->base.is_jmp = DISAS_EXIT; in do_wrtick_cmpr()
3378 TRANS(WRTICK_CMPR, 64, do_wr_special, a, supervisor(dc), do_wrtick_cmpr)
3380 static void do_wrstick(DisasContext *dc, TCGv src) in do_wrstick() argument
3386 translator_io_start(&dc->base); in do_wrstick()
3389 dc->base.is_jmp = DISAS_EXIT; in do_wrstick()
3395 TRANS(WRSTICK, 64, do_wr_special, a, supervisor(dc), do_wrstick)
3397 static void do_wrstick_cmpr(DisasContext *dc, TCGv src) in do_wrstick_cmpr() argument
3403 translator_io_start(&dc->base); in do_wrstick_cmpr()
3406 dc->base.is_jmp = DISAS_EXIT; in do_wrstick_cmpr()
3409 TRANS(WRSTICK_CMPR, 64, do_wr_special, a, supervisor(dc), do_wrstick_cmpr)
3411 static void do_wrpowerdown(DisasContext *dc, TCGv src) in do_wrpowerdown() argument
3413 finishing_insn(dc); in do_wrpowerdown()
3414 save_state(dc); in do_wrpowerdown()
3418 TRANS(WRPOWERDOWN, POWERDOWN, do_wr_special, a, supervisor(dc), do_wrpowerdown) in TRANS() argument
3420 static void do_wrmwait(DisasContext *dc, TCGv src) in TRANS()
3426 dc->base.is_jmp = DISAS_EXIT; in TRANS()
3431 static void do_wrpsr(DisasContext *dc, TCGv src) in TRANS()
3434 dc->base.is_jmp = DISAS_EXIT; in TRANS()
3437 TRANS(WRPSR, 32, do_wr_special, a, supervisor(dc), do_wrpsr)
3439 static void do_wrwim(DisasContext *dc, TCGv src) in do_wrwim() argument
3441 target_ulong mask = MAKE_64BIT_MASK(0, dc->def->nwindows); in do_wrwim()
3448 TRANS(WRWIM, 32, do_wr_special, a, supervisor(dc), do_wrwim)
3450 static void do_wrtpc(DisasContext *dc, TCGv src) in do_wrtpc() argument
3462 TRANS(WRPR_tpc, 64, do_wr_special, a, supervisor(dc), do_wrtpc)
3464 static void do_wrtnpc(DisasContext *dc, TCGv src) in do_wrtnpc() argument
3476 TRANS(WRPR_tnpc, 64, do_wr_special, a, supervisor(dc), do_wrtnpc)
3478 static void do_wrtstate(DisasContext *dc, TCGv src) in do_wrtstate() argument
3490 TRANS(WRPR_tstate, 64, do_wr_special, a, supervisor(dc), do_wrtstate)
3492 static void do_wrtt(DisasContext *dc, TCGv src) in do_wrtt() argument
3504 TRANS(WRPR_tt, 64, do_wr_special, a, supervisor(dc), do_wrtt)
3506 static void do_wrtick(DisasContext *dc, TCGv src) in do_wrtick() argument
3511 translator_io_start(&dc->base); in do_wrtick()
3514 dc->base.is_jmp = DISAS_EXIT; in do_wrtick()
3517 TRANS(WRPR_tick, 64, do_wr_special, a, supervisor(dc), do_wrtick)
3519 static void do_wrtba(DisasContext *dc, TCGv src) in do_wrtba() argument
3524 TRANS(WRPR_tba, 64, do_wr_special, a, supervisor(dc), do_wrtba)
3526 static void do_wrpstate(DisasContext *dc, TCGv src) in do_wrpstate() argument
3528 save_state(dc); in do_wrpstate()
3529 if (translator_io_start(&dc->base)) { in do_wrpstate()
3530 dc->base.is_jmp = DISAS_EXIT; in do_wrpstate()
3533 dc->npc = DYNAMIC_PC; in do_wrpstate()
3536 TRANS(WRPR_pstate, 64, do_wr_special, a, supervisor(dc), do_wrpstate)
3538 static void do_wrtl(DisasContext *dc, TCGv src) in do_wrtl() argument
3540 save_state(dc); in do_wrtl()
3542 dc->npc = DYNAMIC_PC; in do_wrtl()
3545 TRANS(WRPR_tl, 64, do_wr_special, a, supervisor(dc), do_wrtl)
3547 static void do_wrpil(DisasContext *dc, TCGv src) in do_wrpil() argument
3549 if (translator_io_start(&dc->base)) { in do_wrpil()
3550 dc->base.is_jmp = DISAS_EXIT; in do_wrpil()
3555 TRANS(WRPR_pil, 64, do_wr_special, a, supervisor(dc), do_wrpil)
3557 static void do_wrcwp(DisasContext *dc, TCGv src) in do_wrcwp() argument
3562 TRANS(WRPR_cwp, 64, do_wr_special, a, supervisor(dc), do_wrcwp)
3564 static void do_wrcansave(DisasContext *dc, TCGv src) in do_wrcansave() argument
3569 TRANS(WRPR_cansave, 64, do_wr_special, a, supervisor(dc), do_wrcansave)
3571 static void do_wrcanrestore(DisasContext *dc, TCGv src) in do_wrcanrestore() argument
3576 TRANS(WRPR_canrestore, 64, do_wr_special, a, supervisor(dc), do_wrcanrestore)
3578 static void do_wrcleanwin(DisasContext *dc, TCGv src) in do_wrcleanwin() argument
3583 TRANS(WRPR_cleanwin, 64, do_wr_special, a, supervisor(dc), do_wrcleanwin)
3585 static void do_wrotherwin(DisasContext *dc, TCGv src) in do_wrotherwin() argument
3590 TRANS(WRPR_otherwin, 64, do_wr_special, a, supervisor(dc), do_wrotherwin)
3592 static void do_wrwstate(DisasContext *dc, TCGv src) in do_wrwstate() argument
3597 TRANS(WRPR_wstate, 64, do_wr_special, a, supervisor(dc), do_wrwstate)
3599 static void do_wrgl(DisasContext *dc, TCGv src) in do_wrgl() argument
3604 TRANS(WRPR_gl, GL, do_wr_special, a, supervisor(dc), do_wrgl) in TRANS() argument
3607 static void do_wrssr(DisasContext *dc, TCGv src) in TRANS()
3612 TRANS(WRPR_strand_status, HYPV, do_wr_special, a, hypervisor(dc), do_wrssr) in TRANS() argument
3614 TRANS(WRTBR, 32, do_wr_special, a, supervisor(dc), do_wrtba) in TRANS()
3616 static void do_wrhpstate(DisasContext *dc, TCGv src) in TRANS()
3619 dc->base.is_jmp = DISAS_EXIT; in TRANS()
3622 TRANS(WRHPR_hpstate, HYPV, do_wr_special, a, hypervisor(dc), do_wrhpstate) in TRANS() argument
3624 static void do_wrhtstate(DisasContext *dc, TCGv src) in TRANS()
3638 TRANS(WRHPR_htstate, HYPV, do_wr_special, a, hypervisor(dc), do_wrhtstate) in TRANS() argument
3640 static void do_wrhintp(DisasContext *dc, TCGv src) in TRANS()
3645 TRANS(WRHPR_hintp, HYPV, do_wr_special, a, hypervisor(dc), do_wrhintp) in TRANS() argument
3647 static void do_wrhtba(DisasContext *dc, TCGv src) in TRANS()
3652 TRANS(WRHPR_htba, HYPV, do_wr_special, a, hypervisor(dc), do_wrhtba) in TRANS() argument
3654 static void do_wrhstick_cmpr(DisasContext *dc, TCGv src) in TRANS()
3660 translator_io_start(&dc->base); in TRANS()
3663 dc->base.is_jmp = DISAS_EXIT; in TRANS()
3666 TRANS(WRHPR_hstick_cmpr, HYPV, do_wr_special, a, hypervisor(dc), in TRANS() argument
3669 static bool do_saved_restored(DisasContext *dc, bool saved) in TRANS()
3671 if (!supervisor(dc)) { in TRANS()
3672 return raise_priv(dc); in TRANS()
3679 return advance_pc(dc); in TRANS()
3685 static bool trans_NOP(DisasContext *dc, arg_NOP *a) in trans_NOP() argument
3687 return advance_pc(dc); in trans_NOP()
3697 static bool do_arith_int(DisasContext *dc, arg_r_r_ri_cc *a, in do_arith_int() argument
3712 dst = gen_dest_gpr(dc, a->rd); in do_arith_int()
3714 src1 = gen_load_gpr(dc, a->rs1); in do_arith_int()
3736 gen_store_gpr(dc, a->rd, dst); in do_arith_int()
3737 return advance_pc(dc); in do_arith_int()
3740 static bool do_arith(DisasContext *dc, arg_r_r_ri_cc *a, in do_arith() argument
3746 return do_arith_int(dc, a, func_cc, NULL, false); in do_arith()
3748 return do_arith_int(dc, a, func, funci, false); in do_arith()
3751 static bool do_logic(DisasContext *dc, arg_r_r_ri_cc *a, in do_logic() argument
3755 return do_arith_int(dc, a, func, funci, a->cc); in do_logic()
3785 static bool trans_OR(DisasContext *dc, arg_r_r_ri_cc *a) in TRANS()
3790 gen_store_gpr(dc, a->rd, tcg_constant_tl(a->rs2_or_imm)); in TRANS()
3795 gen_store_gpr(dc, a->rd, cpu_regs[a->rs2_or_imm]); in TRANS()
3797 return advance_pc(dc); in TRANS()
3799 return do_logic(dc, a, tcg_gen_or_tl, tcg_gen_ori_tl); in TRANS()
3802 static bool trans_UDIV(DisasContext *dc, arg_r_r_ri *a) in trans_UDIV() argument
3807 if (!avail_DIV(dc)) { in trans_UDIV()
3816 gen_exception(dc, TT_DIV_ZERO); in trans_UDIV()
3826 finishing_insn(dc); in trans_UDIV()
3827 flush_cond(dc); in trans_UDIV()
3832 lab = delay_exception(dc, TT_DIV_ZERO); in trans_UDIV()
3844 tcg_gen_concat_tl_i64(t1, gen_load_gpr(dc, a->rs1), cpu_y); in trans_UDIV()
3849 dst = gen_dest_gpr(dc, a->rd); in trans_UDIV()
3851 gen_store_gpr(dc, a->rd, dst); in trans_UDIV()
3852 return advance_pc(dc); in trans_UDIV()
3855 static bool trans_UDIVX(DisasContext *dc, arg_r_r_ri *a) in trans_UDIVX() argument
3859 if (!avail_64(dc)) { in trans_UDIVX()
3868 gen_exception(dc, TT_DIV_ZERO); in trans_UDIVX()
3877 finishing_insn(dc); in trans_UDIVX()
3878 flush_cond(dc); in trans_UDIVX()
3880 lab = delay_exception(dc, TT_DIV_ZERO); in trans_UDIVX()
3885 dst = gen_dest_gpr(dc, a->rd); in trans_UDIVX()
3886 src1 = gen_load_gpr(dc, a->rs1); in trans_UDIVX()
3889 gen_store_gpr(dc, a->rd, dst); in trans_UDIVX()
3890 return advance_pc(dc); in trans_UDIVX()
3893 static bool trans_SDIVX(DisasContext *dc, arg_r_r_ri *a) in trans_SDIVX() argument
3897 if (!avail_64(dc)) { in trans_SDIVX()
3906 gen_exception(dc, TT_DIV_ZERO); in trans_SDIVX()
3910 dst = gen_dest_gpr(dc, a->rd); in trans_SDIVX()
3911 src1 = gen_load_gpr(dc, a->rs1); in trans_SDIVX()
3916 gen_store_gpr(dc, a->rd, dst); in trans_SDIVX()
3917 return advance_pc(dc); in trans_SDIVX()
3924 finishing_insn(dc); in trans_SDIVX()
3925 flush_cond(dc); in trans_SDIVX()
3927 lab = delay_exception(dc, TT_DIV_ZERO); in trans_SDIVX()
3946 gen_store_gpr(dc, a->rd, dst); in trans_SDIVX()
3947 return advance_pc(dc); in trans_SDIVX()
3950 static bool gen_edge(DisasContext *dc, arg_r_r_r *a, in gen_edge() argument
3954 uint64_t amask = address_mask_i(dc, -8); in gen_edge()
3956 dst = gen_dest_gpr(dc, a->rd); in gen_edge()
3957 s1 = gen_load_gpr(dc, a->rs1); in gen_edge()
3958 s2 = gen_load_gpr(dc, a->rs2); in gen_edge()
4011 gen_store_gpr(dc, a->rd, dst); in gen_edge()
4012 return advance_pc(dc); in gen_edge()
4029 static bool do_rr(DisasContext *dc, arg_r_r *a, in do_rr() argument
4032 TCGv dst = gen_dest_gpr(dc, a->rd); in do_rr()
4033 TCGv src = gen_load_gpr(dc, a->rs); in do_rr()
4036 gen_store_gpr(dc, a->rd, dst); in do_rr()
4037 return advance_pc(dc); in do_rr()
4042 static bool do_rrr(DisasContext *dc, arg_r_r_r *a, in TRANS()
4045 TCGv dst = gen_dest_gpr(dc, a->rd); in TRANS()
4046 TCGv src1 = gen_load_gpr(dc, a->rs1); in TRANS()
4047 TCGv src2 = gen_load_gpr(dc, a->rs2); in TRANS()
4050 gen_store_gpr(dc, a->rd, dst); in TRANS()
4051 return advance_pc(dc); in TRANS()
4108 static bool do_cmask(DisasContext *dc, int rs2, void (*func)(TCGv, TCGv, TCGv)) in TRANS()
4110 func(cpu_gsr, cpu_gsr, gen_load_gpr(dc, rs2)); in TRANS()
4118 static bool do_shift_r(DisasContext *dc, arg_shiftr *a, bool l, bool u) in do_shift_r() argument
4123 if (avail_32(dc) && a->x) { in do_shift_r()
4128 tcg_gen_andi_tl(src2, gen_load_gpr(dc, a->rs2), a->x ? 63 : 31); in do_shift_r()
4129 src1 = gen_load_gpr(dc, a->rs1); in do_shift_r()
4130 dst = gen_dest_gpr(dc, a->rd); in do_shift_r()
4150 gen_store_gpr(dc, a->rd, dst); in do_shift_r()
4151 return advance_pc(dc); in do_shift_r()
4158 static bool do_shift_i(DisasContext *dc, arg_shifti *a, bool l, bool u) in TRANS()
4163 if (avail_32(dc) && (a->x || a->i >= 32)) { in TRANS()
4167 src1 = gen_load_gpr(dc, a->rs1); in TRANS()
4168 dst = gen_dest_gpr(dc, a->rd); in TRANS()
4170 if (avail_32(dc) || a->x) { in TRANS()
4187 gen_store_gpr(dc, a->rd, dst); in TRANS()
4188 return advance_pc(dc); in TRANS()
4195 static TCGv gen_rs2_or_imm(DisasContext *dc, bool imm, int rs2_or_imm) in TRANS()
4208 static bool do_mov_cond(DisasContext *dc, DisasCompare *cmp, int rd, TCGv src2) in do_mov_cond() argument
4210 TCGv dst = gen_load_gpr(dc, rd); in do_mov_cond()
4214 gen_store_gpr(dc, rd, dst); in do_mov_cond()
4215 return advance_pc(dc); in do_mov_cond()
4218 static bool trans_MOVcc(DisasContext *dc, arg_MOVcc *a) in trans_MOVcc() argument
4220 TCGv src2 = gen_rs2_or_imm(dc, a->imm, a->rs2_or_imm); in trans_MOVcc()
4226 gen_compare(&cmp, a->cc, a->cond, dc); in trans_MOVcc()
4227 return do_mov_cond(dc, &cmp, a->rd, src2); in trans_MOVcc()
4230 static bool trans_MOVfcc(DisasContext *dc, arg_MOVfcc *a) in trans_MOVfcc() argument
4232 TCGv src2 = gen_rs2_or_imm(dc, a->imm, a->rs2_or_imm); in trans_MOVfcc()
4239 return do_mov_cond(dc, &cmp, a->rd, src2); in trans_MOVfcc()
4242 static bool trans_MOVR(DisasContext *dc, arg_MOVR *a) in trans_MOVR() argument
4244 TCGv src2 = gen_rs2_or_imm(dc, a->imm, a->rs2_or_imm); in trans_MOVR()
4250 if (!gen_compare_reg(&cmp, a->cond, gen_load_gpr(dc, a->rs1))) { in trans_MOVR()
4253 return do_mov_cond(dc, &cmp, a->rd, src2); in trans_MOVR()
4256 static bool do_add_special(DisasContext *dc, arg_r_r_ri *a, in do_add_special() argument
4257 bool (*func)(DisasContext *dc, int rd, TCGv src)) in do_add_special() argument
4272 src1 = gen_load_gpr(dc, a->rs1); in do_add_special()
4278 return func(dc, a->rd, sum); in do_add_special()
4281 static bool do_jmpl(DisasContext *dc, int rd, TCGv src) in do_jmpl() argument
4287 target_ulong cur_pc = dc->pc; in do_jmpl()
4289 gen_check_align(dc, src, 3); in do_jmpl()
4291 gen_mov_pc_npc(dc); in do_jmpl()
4293 gen_address_mask(dc, cpu_npc); in do_jmpl()
4294 gen_store_gpr(dc, rd, tcg_constant_tl(cur_pc)); in do_jmpl()
4296 dc->npc = DYNAMIC_PC_LOOKUP; in do_jmpl()
4302 static bool do_rett(DisasContext *dc, int rd, TCGv src) in TRANS()
4304 if (!supervisor(dc)) { in TRANS()
4305 return raise_priv(dc); in TRANS()
4308 gen_check_align(dc, src, 3); in TRANS()
4310 gen_mov_pc_npc(dc); in TRANS()
4314 dc->npc = DYNAMIC_PC; in TRANS()
4320 static bool do_return(DisasContext *dc, int rd, TCGv src) in do_return() argument
4322 gen_check_align(dc, src, 3); in do_return()
4325 gen_mov_pc_npc(dc); in do_return()
4327 gen_address_mask(dc, cpu_npc); in do_return()
4329 dc->npc = DYNAMIC_PC_LOOKUP; in do_return()
4335 static bool do_save(DisasContext *dc, int rd, TCGv src) in do_save() argument
4338 gen_store_gpr(dc, rd, src); in do_save()
4339 return advance_pc(dc); in do_save()
4344 static bool do_restore(DisasContext *dc, int rd, TCGv src) in TRANS()
4347 gen_store_gpr(dc, rd, src); in TRANS()
4348 return advance_pc(dc); in TRANS()
4353 static bool do_done_retry(DisasContext *dc, bool done) in TRANS()
4355 if (!supervisor(dc)) { in TRANS()
4356 return raise_priv(dc); in TRANS()
4358 dc->npc = DYNAMIC_PC; in TRANS()
4359 dc->pc = DYNAMIC_PC; in TRANS()
4360 translator_io_start(&dc->base); in TRANS()
4376 static TCGv gen_ldst_addr(DisasContext *dc, int rs1, bool imm, int rs2_or_imm) in gen_ldst_addr() argument
4385 addr = gen_load_gpr(dc, rs1); in gen_ldst_addr()
4395 if (AM_CHECK(dc)) { in gen_ldst_addr()
4405 static bool do_ld_gpr(DisasContext *dc, arg_r_r_ri_asi *a, MemOp mop) in do_ld_gpr() argument
4407 TCGv reg, addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in do_ld_gpr()
4413 da = resolve_asi(dc, a->asi, mop); in do_ld_gpr()
4415 reg = gen_dest_gpr(dc, a->rd); in do_ld_gpr()
4416 gen_ld_asi(dc, &da, reg, addr); in do_ld_gpr()
4417 gen_store_gpr(dc, a->rd, reg); in do_ld_gpr()
4418 return advance_pc(dc); in do_ld_gpr()
4429 static bool do_st_gpr(DisasContext *dc, arg_r_r_ri_asi *a, MemOp mop) in TRANS()
4431 TCGv reg, addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in TRANS()
4437 da = resolve_asi(dc, a->asi, mop); in TRANS()
4439 reg = gen_load_gpr(dc, a->rd); in TRANS()
4440 gen_st_asi(dc, &da, reg, addr); in TRANS()
4441 return advance_pc(dc); in TRANS()
4449 static bool trans_LDD(DisasContext *dc, arg_r_r_ri_asi *a) in TRANS()
4457 addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in TRANS()
4461 da = resolve_asi(dc, a->asi, MO_TEUQ); in TRANS()
4462 gen_ldda_asi(dc, &da, addr, a->rd); in TRANS()
4463 return advance_pc(dc); in TRANS()
4466 static bool trans_STD(DisasContext *dc, arg_r_r_ri_asi *a) in trans_STD() argument
4474 addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in trans_STD()
4478 da = resolve_asi(dc, a->asi, MO_TEUQ); in trans_STD()
4479 gen_stda_asi(dc, &da, addr, a->rd); in trans_STD()
4480 return advance_pc(dc); in trans_STD()
4483 static bool trans_LDSTUB(DisasContext *dc, arg_r_r_ri_asi *a) in trans_LDSTUB() argument
4488 addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in trans_LDSTUB()
4492 da = resolve_asi(dc, a->asi, MO_UB); in trans_LDSTUB()
4494 reg = gen_dest_gpr(dc, a->rd); in trans_LDSTUB()
4495 gen_ldstub_asi(dc, &da, reg, addr); in trans_LDSTUB()
4496 gen_store_gpr(dc, a->rd, reg); in trans_LDSTUB()
4497 return advance_pc(dc); in trans_LDSTUB()
4500 static bool trans_SWAP(DisasContext *dc, arg_r_r_ri_asi *a) in trans_SWAP() argument
4505 addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in trans_SWAP()
4509 da = resolve_asi(dc, a->asi, MO_TEUL); in trans_SWAP()
4511 dst = gen_dest_gpr(dc, a->rd); in trans_SWAP()
4512 src = gen_load_gpr(dc, a->rd); in trans_SWAP()
4513 gen_swap_asi(dc, &da, dst, src, addr); in trans_SWAP()
4514 gen_store_gpr(dc, a->rd, dst); in trans_SWAP()
4515 return advance_pc(dc); in trans_SWAP()
4518 static bool do_casa(DisasContext *dc, arg_r_r_ri_asi *a, MemOp mop) in do_casa() argument
4523 addr = gen_ldst_addr(dc, a->rs1, true, 0); in do_casa()
4527 da = resolve_asi(dc, a->asi, mop); in do_casa()
4529 o = gen_dest_gpr(dc, a->rd); in do_casa()
4530 n = gen_load_gpr(dc, a->rd); in do_casa()
4531 c = gen_load_gpr(dc, a->rs2_or_imm); in do_casa()
4532 gen_cas_asi(dc, &da, o, n, c, addr); in do_casa()
4533 gen_store_gpr(dc, a->rd, o); in do_casa()
4534 return advance_pc(dc); in do_casa()
4540 static bool do_ld_fpr(DisasContext *dc, arg_r_r_ri_asi *a, MemOp sz) in TRANS()
4542 TCGv addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in TRANS()
4548 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
4551 if (sz == MO_128 && gen_trap_float128(dc)) { in TRANS()
4554 da = resolve_asi(dc, a->asi, MO_TE | sz); in TRANS()
4555 gen_ldf_asi(dc, &da, sz, addr, a->rd); in TRANS()
4556 gen_update_fprs_dirty(dc, a->rd); in TRANS()
4557 return advance_pc(dc); in TRANS()
4568 static bool do_st_fpr(DisasContext *dc, arg_r_r_ri_asi *a, MemOp sz) in TRANS()
4570 TCGv addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in TRANS()
4577 if (gen_trap_ifnofpu(dc)) { in TRANS()
4580 if (sz == MO_128 && gen_trap_float128(dc)) { in TRANS()
4583 da = resolve_asi(dc, a->asi, MO_TE | sz); in TRANS()
4584 gen_stf_asi(dc, &da, sz, addr, a->rd); in TRANS()
4585 return advance_pc(dc); in TRANS()
4596 static bool trans_STDFQ(DisasContext *dc, arg_STDFQ *a) in TRANS()
4600 if (!avail_32(dc)) { in TRANS()
4603 addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in TRANS()
4607 if (!supervisor(dc)) { in TRANS()
4608 return raise_priv(dc); in TRANS()
4611 if (gen_trap_ifnofpu(dc)) { in TRANS()
4614 if (!dc->fsr_qne) { in TRANS()
4615 gen_op_fpexception_im(dc, FSR_FTT_SEQ_ERROR); in TRANS()
4622 tcg_gen_qemu_st_i64(fq, addr, dc->mem_idx, MO_TEUQ | MO_ALIGN_4); in TRANS()
4627 dc->fsr_qne = 0; in TRANS()
4629 return advance_pc(dc); in TRANS()
4635 static bool trans_LDFSR(DisasContext *dc, arg_r_r_ri *a) in trans_LDFSR() argument
4637 TCGv addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in trans_LDFSR()
4643 if (gen_trap_if_nofpu_fpexception(dc)) { in trans_LDFSR()
4648 tcg_gen_qemu_ld_i32(tmp, addr, dc->mem_idx, MO_TEUL | MO_ALIGN); in trans_LDFSR()
4654 return advance_pc(dc); in trans_LDFSR()
4657 static bool do_ldxfsr(DisasContext *dc, arg_r_r_ri *a, bool entire) in do_ldxfsr() argument
4660 TCGv addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in do_ldxfsr()
4667 if (gen_trap_if_nofpu_fpexception(dc)) { in do_ldxfsr()
4672 tcg_gen_qemu_ld_i64(t64, addr, dc->mem_idx, MO_TEUQ | MO_ALIGN); in do_ldxfsr()
4687 return advance_pc(dc); in do_ldxfsr()
4696 static bool do_stfsr(DisasContext *dc, arg_r_r_ri *a, MemOp mop) in TRANS()
4698 TCGv addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm); in TRANS()
4705 if (gen_trap_ifnofpu(dc)) { in TRANS()
4711 tcg_gen_qemu_st_tl(fsr, addr, dc->mem_idx, mop | MO_ALIGN); in TRANS()
4712 return advance_pc(dc); in TRANS()
4718 static bool do_fc(DisasContext *dc, int rd, int32_t c) in TRANS()
4720 if (gen_trap_ifnofpu(dc)) { in TRANS()
4723 gen_store_fpr_F(dc, rd, tcg_constant_i32(c)); in TRANS()
4724 return advance_pc(dc); in TRANS()
4730 static bool do_dc(DisasContext *dc, int rd, int64_t c) in do_dc() argument
4732 if (gen_trap_ifnofpu(dc)) { in do_dc()
4735 gen_store_fpr_D(dc, rd, tcg_constant_i64(c)); in do_dc()
4736 return advance_pc(dc); in do_dc()
4742 static bool do_ff(DisasContext *dc, arg_r_r *a, in do_ff() argument
4747 if (gen_trap_if_nofpu_fpexception(dc)) { in do_ff()
4751 tmp = gen_load_fpr_F(dc, a->rs); in do_ff()
4753 gen_store_fpr_F(dc, a->rd, tmp); in do_ff()
4754 return advance_pc(dc); in do_ff()
4763 static bool do_fd(DisasContext *dc, arg_r_r *a, in TRANS()
4769 if (gen_trap_ifnofpu(dc)) { in TRANS()
4774 src = gen_load_fpr_D(dc, a->rs); in TRANS()
4776 gen_store_fpr_F(dc, a->rd, dst); in TRANS()
4777 return advance_pc(dc); in TRANS()
4783 static bool do_env_ff(DisasContext *dc, arg_r_r *a, in TRANS()
4788 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
4792 tmp = gen_load_fpr_F(dc, a->rs); in TRANS()
4794 gen_store_fpr_F(dc, a->rd, tmp); in TRANS()
4795 return advance_pc(dc); in TRANS()
4802 static bool do_env_fd(DisasContext *dc, arg_r_r *a, in TRANS()
4808 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
4813 src = gen_load_fpr_D(dc, a->rs); in TRANS()
4815 gen_store_fpr_F(dc, a->rd, dst); in TRANS()
4816 return advance_pc(dc); in TRANS()
4823 static bool do_dd(DisasContext *dc, arg_r_r *a, in TRANS()
4828 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
4833 src = gen_load_fpr_D(dc, a->rs); in TRANS()
4835 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
4836 return advance_pc(dc); in TRANS()
4845 static bool do_env_dd(DisasContext *dc, arg_r_r *a, in TRANS()
4850 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
4855 src = gen_load_fpr_D(dc, a->rs); in TRANS()
4857 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
4858 return advance_pc(dc); in TRANS()
4865 static bool do_df(DisasContext *dc, arg_r_r *a, in TRANS()
4871 if (gen_trap_ifnofpu(dc)) { in TRANS()
4876 src = gen_load_fpr_F(dc, a->rs); in TRANS()
4878 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
4879 return advance_pc(dc); in TRANS()
4884 static bool do_env_df(DisasContext *dc, arg_r_r *a, in TRANS()
4890 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
4895 src = gen_load_fpr_F(dc, a->rs); in TRANS()
4897 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
4898 return advance_pc(dc); in TRANS()
4905 static bool do_qq(DisasContext *dc, arg_r_r *a, in TRANS()
4910 if (gen_trap_ifnofpu(dc)) { in TRANS()
4913 if (gen_trap_float128(dc)) { in TRANS()
4918 t = gen_load_fpr_Q(dc, a->rs); in TRANS()
4920 gen_store_fpr_Q(dc, a->rd, t); in TRANS()
4921 return advance_pc(dc); in TRANS()
4928 static bool do_env_qq(DisasContext *dc, arg_r_r *a, in do_env_qq() argument
4933 if (gen_trap_if_nofpu_fpexception(dc)) { in do_env_qq()
4936 if (gen_trap_float128(dc)) { in do_env_qq()
4940 t = gen_load_fpr_Q(dc, a->rs); in do_env_qq()
4942 gen_store_fpr_Q(dc, a->rd, t); in do_env_qq()
4943 return advance_pc(dc); in do_env_qq()
4948 static bool do_env_fq(DisasContext *dc, arg_r_r *a, in TRANS()
4954 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
4957 if (gen_trap_float128(dc)) { in TRANS()
4961 src = gen_load_fpr_Q(dc, a->rs); in TRANS()
4964 gen_store_fpr_F(dc, a->rd, dst); in TRANS()
4965 return advance_pc(dc); in TRANS()
4971 static bool do_env_dq(DisasContext *dc, arg_r_r *a, in TRANS()
4977 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
4980 if (gen_trap_float128(dc)) { in TRANS()
4984 src = gen_load_fpr_Q(dc, a->rs); in TRANS()
4987 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
4988 return advance_pc(dc); in TRANS()
4994 static bool do_env_qf(DisasContext *dc, arg_r_r *a, in TRANS()
5000 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
5003 if (gen_trap_float128(dc)) { in TRANS()
5007 src = gen_load_fpr_F(dc, a->rs); in TRANS()
5010 gen_store_fpr_Q(dc, a->rd, dst); in TRANS()
5011 return advance_pc(dc); in TRANS()
5017 static bool do_env_qd(DisasContext *dc, arg_r_r *a, in TRANS()
5023 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
5027 src = gen_load_fpr_D(dc, a->rs); in TRANS()
5030 gen_store_fpr_Q(dc, a->rd, dst); in TRANS()
5031 return advance_pc(dc); in TRANS()
5037 static bool do_fff(DisasContext *dc, arg_r_r_r *a, in TRANS()
5042 if (gen_trap_ifnofpu(dc)) { in TRANS()
5046 src1 = gen_load_fpr_F(dc, a->rs1); in TRANS()
5047 src2 = gen_load_fpr_F(dc, a->rs2); in TRANS()
5049 gen_store_fpr_F(dc, a->rd, src1); in TRANS()
5050 return advance_pc(dc); in TRANS()
5075 static bool do_env_fff(DisasContext *dc, arg_r_r_r *a, in TRANS()
5080 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
5084 src1 = gen_load_fpr_F(dc, a->rs1); in TRANS()
5085 src2 = gen_load_fpr_F(dc, a->rs2); in TRANS()
5087 gen_store_fpr_F(dc, a->rd, src1); in TRANS()
5088 return advance_pc(dc); in TRANS()
5098 static bool do_dff(DisasContext *dc, arg_r_r_r *a, in TRANS()
5104 if (gen_trap_ifnofpu(dc)) { in TRANS()
5109 src1 = gen_load_fpr_F(dc, a->rs1); in TRANS()
5110 src2 = gen_load_fpr_F(dc, a->rs2); in TRANS()
5112 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
5113 return advance_pc(dc); in TRANS()
5122 static bool do_dfd(DisasContext *dc, arg_r_r_r *a, in TRANS()
5128 if (gen_trap_ifnofpu(dc)) { in TRANS()
5133 src1 = gen_load_fpr_F(dc, a->rs1); in TRANS()
5134 src2 = gen_load_fpr_D(dc, a->rs2); in TRANS()
5136 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
5137 return advance_pc(dc); in TRANS()
5142 static bool do_gvec_ddd(DisasContext *dc, arg_r_r_r *a, MemOp vece, in TRANS()
5146 if (gen_trap_ifnofpu(dc)) { in TRANS()
5152 return advance_pc(dc); in TRANS()
5199 static bool do_ddd(DisasContext *dc, arg_r_r_r *a, in TRANS()
5204 if (gen_trap_ifnofpu(dc)) { in TRANS()
5209 src1 = gen_load_fpr_D(dc, a->rs1); in TRANS()
5210 src2 = gen_load_fpr_D(dc, a->rs2); in TRANS()
5212 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
5213 return advance_pc(dc); in TRANS()
5241 static bool do_rdd(DisasContext *dc, arg_r_r_r *a, in TRANS()
5247 if (gen_trap_ifnofpu(dc)) { in TRANS()
5251 dst = gen_dest_gpr(dc, a->rd); in TRANS()
5252 src1 = gen_load_fpr_D(dc, a->rs1); in TRANS()
5253 src2 = gen_load_fpr_D(dc, a->rs2); in TRANS()
5255 gen_store_gpr(dc, a->rd, dst); in TRANS()
5256 return advance_pc(dc); in TRANS()
5284 static bool do_env_ddd(DisasContext *dc, arg_r_r_r *a, in TRANS()
5289 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
5294 src1 = gen_load_fpr_D(dc, a->rs1); in TRANS()
5295 src2 = gen_load_fpr_D(dc, a->rs2); in TRANS()
5297 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
5298 return advance_pc(dc); in TRANS()
5308 static bool trans_FsMULd(DisasContext *dc, arg_r_r_r *a) in TRANS()
5313 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
5316 if (!(dc->def->features & CPU_FEATURE_FSMULD)) { in TRANS()
5317 return raise_unimpfpop(dc); in TRANS()
5321 src1 = gen_load_fpr_F(dc, a->rs1); in TRANS()
5322 src2 = gen_load_fpr_F(dc, a->rs2); in TRANS()
5324 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
5325 return advance_pc(dc); in TRANS()
5328 static bool trans_FNsMULd(DisasContext *dc, arg_r_r_r *a) in trans_FNsMULd() argument
5333 if (!avail_VIS3(dc)) { in trans_FNsMULd()
5336 if (gen_trap_ifnofpu(dc)) { in trans_FNsMULd()
5340 src1 = gen_load_fpr_F(dc, a->rs1); in trans_FNsMULd()
5341 src2 = gen_load_fpr_F(dc, a->rs2); in trans_FNsMULd()
5343 gen_store_fpr_D(dc, a->rd, dst); in trans_FNsMULd()
5344 return advance_pc(dc); in trans_FNsMULd()
5347 static bool do_ffff(DisasContext *dc, arg_r_r_r_r *a, in do_ffff() argument
5352 if (gen_trap_ifnofpu(dc)) { in do_ffff()
5356 src1 = gen_load_fpr_F(dc, a->rs1); in do_ffff()
5357 src2 = gen_load_fpr_F(dc, a->rs2); in do_ffff()
5358 src3 = gen_load_fpr_F(dc, a->rs3); in do_ffff()
5361 gen_store_fpr_F(dc, a->rd, dst); in do_ffff()
5362 return advance_pc(dc); in do_ffff()
5370 static bool do_dddd(DisasContext *dc, arg_r_r_r_r *a, in TRANS()
5375 if (gen_trap_ifnofpu(dc)) { in TRANS()
5380 src1 = gen_load_fpr_D(dc, a->rs1); in TRANS()
5381 src2 = gen_load_fpr_D(dc, a->rs2); in TRANS()
5382 src3 = gen_load_fpr_D(dc, a->rs3); in TRANS()
5384 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
5385 return advance_pc(dc); in TRANS()
5396 static bool trans_FALIGNDATAi(DisasContext *dc, arg_r_r_r *a) in TRANS()
5401 if (!avail_VIS4(dc)) { in TRANS()
5404 if (gen_trap_ifnofpu(dc)) { in TRANS()
5409 src1 = gen_load_fpr_D(dc, a->rd); in TRANS()
5410 src2 = gen_load_fpr_D(dc, a->rs2); in TRANS()
5411 src3 = gen_load_gpr(dc, a->rs1); in TRANS()
5413 gen_store_fpr_D(dc, a->rd, dst); in TRANS()
5414 return advance_pc(dc); in TRANS()
5417 static bool do_env_qqq(DisasContext *dc, arg_r_r_r *a, in do_env_qqq() argument
5422 if (gen_trap_if_nofpu_fpexception(dc)) { in do_env_qqq()
5425 if (gen_trap_float128(dc)) { in do_env_qqq()
5429 src1 = gen_load_fpr_Q(dc, a->rs1); in do_env_qqq()
5430 src2 = gen_load_fpr_Q(dc, a->rs2); in do_env_qqq()
5432 gen_store_fpr_Q(dc, a->rd, src1); in do_env_qqq()
5433 return advance_pc(dc); in do_env_qqq()
5441 static bool trans_FdMULq(DisasContext *dc, arg_r_r_r *a) in TRANS()
5446 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
5449 if (gen_trap_float128(dc)) { in TRANS()
5453 src1 = gen_load_fpr_D(dc, a->rs1); in TRANS()
5454 src2 = gen_load_fpr_D(dc, a->rs2); in TRANS()
5457 gen_store_fpr_Q(dc, a->rd, dst); in TRANS()
5458 return advance_pc(dc); in TRANS()
5461 static bool do_fmovr(DisasContext *dc, arg_FMOVRs *a, bool is_128, in do_fmovr() argument
5466 if (!gen_compare_reg(&cmp, a->cond, gen_load_gpr(dc, a->rs1))) { in do_fmovr()
5469 if (gen_trap_ifnofpu(dc)) { in do_fmovr()
5472 if (is_128 && gen_trap_float128(dc)) { in do_fmovr()
5477 func(dc, &cmp, a->rd, a->rs2); in do_fmovr()
5478 return advance_pc(dc); in do_fmovr()
5485 static bool do_fmovcc(DisasContext *dc, arg_FMOVscc *a, bool is_128, in do_fmovcc() argument
5490 if (gen_trap_ifnofpu(dc)) { in do_fmovcc()
5493 if (is_128 && gen_trap_float128(dc)) { in do_fmovcc()
5498 gen_compare(&cmp, a->cc, a->cond, dc); in do_fmovcc()
5499 func(dc, &cmp, a->rd, a->rs2); in do_fmovcc()
5500 return advance_pc(dc); in do_fmovcc()
5507 static bool do_fmovfcc(DisasContext *dc, arg_FMOVsfcc *a, bool is_128, in do_fmovfcc() argument
5512 if (gen_trap_ifnofpu(dc)) { in do_fmovfcc()
5515 if (is_128 && gen_trap_float128(dc)) { in do_fmovfcc()
5521 func(dc, &cmp, a->rd, a->rs2); in do_fmovfcc()
5522 return advance_pc(dc); in do_fmovfcc()
5529 static bool do_fcmps(DisasContext *dc, arg_FCMPs *a, bool e) in do_fcmps() argument
5533 if (avail_32(dc) && a->cc != 0) { in do_fcmps()
5536 if (gen_trap_if_nofpu_fpexception(dc)) { in do_fcmps()
5540 src1 = gen_load_fpr_F(dc, a->rs1); in do_fcmps()
5541 src2 = gen_load_fpr_F(dc, a->rs2); in do_fcmps()
5547 return advance_pc(dc); in do_fcmps()
5553 static bool do_fcmpd(DisasContext *dc, arg_FCMPd *a, bool e) in TRANS()
5557 if (avail_32(dc) && a->cc != 0) { in TRANS()
5560 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
5564 src1 = gen_load_fpr_D(dc, a->rs1); in TRANS()
5565 src2 = gen_load_fpr_D(dc, a->rs2); in TRANS()
5571 return advance_pc(dc); in TRANS()
5577 static bool do_fcmpq(DisasContext *dc, arg_FCMPq *a, bool e) in TRANS()
5581 if (avail_32(dc) && a->cc != 0) { in TRANS()
5584 if (gen_trap_if_nofpu_fpexception(dc)) { in TRANS()
5587 if (gen_trap_float128(dc)) { in TRANS()
5591 src1 = gen_load_fpr_Q(dc, a->rs1); in TRANS()
5592 src2 = gen_load_fpr_Q(dc, a->rs2); in TRANS()
5598 return advance_pc(dc); in TRANS()
5604 static bool trans_FLCMPs(DisasContext *dc, arg_FLCMPs *a) in TRANS()
5608 if (!avail_VIS3(dc)) { in TRANS()
5611 if (gen_trap_ifnofpu(dc)) { in TRANS()
5615 src1 = gen_load_fpr_F(dc, a->rs1); in TRANS()
5616 src2 = gen_load_fpr_F(dc, a->rs2); in TRANS()
5618 return advance_pc(dc); in TRANS()
5621 static bool trans_FLCMPd(DisasContext *dc, arg_FLCMPd *a) in trans_FLCMPd() argument
5625 if (!avail_VIS3(dc)) { in trans_FLCMPd()
5628 if (gen_trap_ifnofpu(dc)) { in trans_FLCMPd()
5632 src1 = gen_load_fpr_D(dc, a->rs1); in trans_FLCMPd()
5633 src2 = gen_load_fpr_D(dc, a->rs2); in trans_FLCMPd()
5635 return advance_pc(dc); in trans_FLCMPd()
5638 static bool do_movf2r(DisasContext *dc, arg_r_r *a, in do_movf2r() argument
5644 if (gen_trap_ifnofpu(dc)) { in do_movf2r()
5647 dst = gen_dest_gpr(dc, a->rd); in do_movf2r()
5649 gen_store_gpr(dc, a->rd, dst); in do_movf2r()
5650 return advance_pc(dc); in do_movf2r()
5657 static bool do_movr2f(DisasContext *dc, arg_r_r *a, in TRANS()
5663 if (gen_trap_ifnofpu(dc)) { in TRANS()
5666 src = gen_load_gpr(dc, a->rs); in TRANS()
5668 return advance_pc(dc); in TRANS()
5676 DisasContext *dc = container_of(dcbase, DisasContext, base); in TRANS() local
5679 dc->pc = dc->base.pc_first; in TRANS()
5680 dc->npc = (target_ulong)dc->base.tb->cs_base; in TRANS()
5681 dc->mem_idx = dc->base.tb->flags & TB_FLAG_MMU_MASK; in TRANS()
5682 dc->def = &cpu_env(cs)->def; in TRANS()
5683 dc->fpu_enabled = tb_fpu_enabled(dc->base.tb->flags); in TRANS()
5684 dc->address_mask_32bit = tb_am_enabled(dc->base.tb->flags); in TRANS()
5686 dc->supervisor = (dc->base.tb->flags & TB_FLAG_SUPER) != 0; in TRANS()
5688 dc->hypervisor = (dc->base.tb->flags & TB_FLAG_HYPER) != 0; in TRANS()
5690 dc->fsr_qne = (dc->base.tb->flags & TB_FLAG_FSR_QNE) != 0; in TRANS()
5694 dc->fprs_dirty = 0; in TRANS()
5695 dc->asi = (dc->base.tb->flags >> TB_FLAG_ASI_SHIFT) & 0xff; in TRANS()
5701 bound = -(dc->base.pc_first | TARGET_PAGE_MASK) / 4; in TRANS()
5702 dc->base.max_insns = MIN(dc->base.max_insns, bound); in TRANS()
5711 DisasContext *dc = container_of(dcbase, DisasContext, base); in sparc_tr_insn_start() local
5712 target_ulong npc = dc->npc; in sparc_tr_insn_start()
5717 assert(dc->jump_pc[1] == dc->pc + 4); in sparc_tr_insn_start()
5718 npc = dc->jump_pc[0] | JUMP_PC; in sparc_tr_insn_start()
5728 tcg_gen_insn_start(dc->pc, npc); in sparc_tr_insn_start()
5733 DisasContext *dc = container_of(dcbase, DisasContext, base); in sparc_tr_translate_insn() local
5736 insn = translator_ldl(cpu_env(cs), &dc->base, dc->pc); in sparc_tr_translate_insn()
5737 dc->base.pc_next += 4; in sparc_tr_translate_insn()
5739 if (!decode(dc, insn)) { in sparc_tr_translate_insn()
5740 gen_exception(dc, TT_ILL_INSN); in sparc_tr_translate_insn()
5743 if (dc->base.is_jmp == DISAS_NORETURN) { in sparc_tr_translate_insn()
5746 if (dc->pc != dc->base.pc_next) { in sparc_tr_translate_insn()
5747 dc->base.is_jmp = DISAS_TOO_MANY; in sparc_tr_translate_insn()
5753 DisasContext *dc = container_of(dcbase, DisasContext, base); in sparc_tr_tb_stop() local
5757 finishing_insn(dc); in sparc_tr_tb_stop()
5759 switch (dc->base.is_jmp) { in sparc_tr_tb_stop()
5762 if (((dc->pc | dc->npc) & 3) == 0) { in sparc_tr_tb_stop()
5764 gen_goto_tb(dc, 0, dc->pc, dc->npc); in sparc_tr_tb_stop()
5769 if (dc->pc & 3) { in sparc_tr_tb_stop()
5770 switch (dc->pc) { in sparc_tr_tb_stop()
5780 tcg_gen_movi_tl(cpu_pc, dc->pc); in sparc_tr_tb_stop()
5783 if (dc->npc & 3) { in sparc_tr_tb_stop()
5784 switch (dc->npc) { in sparc_tr_tb_stop()
5786 gen_generic_branch(dc); in sparc_tr_tb_stop()
5797 tcg_gen_movi_tl(cpu_npc, dc->npc); in sparc_tr_tb_stop()
5811 save_state(dc); in sparc_tr_tb_stop()
5819 for (e = dc->delay_excp_list; e ; e = e_next) { in sparc_tr_tb_stop()
5844 DisasContext dc = {}; in sparc_translate_code() local
5846 translator_loop(cs, tb, max_insns, pc, host_pc, &sparc_tr_ops, &dc.base); in sparc_translate_code()