Lines Matching refs:xb
592 TCGv_i64 xb, sgm; \
597 xb = tcg_temp_new_i64(); \
599 get_cpu_vsr(xb, xB(ctx->opcode), true); \
603 tcg_gen_andc_i64(xb, xb, sgm); \
607 tcg_gen_or_i64(xb, xb, sgm); \
611 tcg_gen_xor_i64(xb, xb, sgm); \
618 tcg_gen_andc_i64(xb, xb, sgm); \
619 tcg_gen_or_i64(xb, xb, xa); \
623 set_cpu_vsr(xT(ctx->opcode), xb, true); \
637 int xb = rB(ctx->opcode) + 32; \
648 get_cpu_vsr(xbh, xb, true); \
649 get_cpu_vsr(xbl, xb, false); \
733 tcg_gen_gvec_2(vsr_full_offset(a->xt), vsr_full_offset(a->xb),
791 vsr_full_offset(a->xb), 16, 16, &op[vece - MO_32]);
803 TCGv_ptr xt, xa, xb;
807 xb = gen_vsr_ptr(a->xb);
809 helper(dest, tcg_env, xt, xa, xb);
825 TCGv_ptr xt, xb;
833 xb = gen_avr_ptr(a->rb);
834 gen_helper_XSCVQPDP(tcg_env, ro, xt, xb);
841 TCGv_ptr xt, xb;
847 xb = gen_avr_ptr(a->rb);
848 gen_helper(tcg_env, xt, xb);
872 TCGv_ptr xt, xb; \
878 xb = gen_vsr_ptr(xB(ctx->opcode)); \
879 gen_helper_##name(tcg_env, xt, xb); \
886 TCGv_ptr xa, xb; \
893 xb = gen_vsr_ptr(xB(ctx->opcode)); \
894 gen_helper_##name(tcg_env, opc, xa, xb); \
901 TCGv_ptr xb; \
907 xb = gen_vsr_ptr(xB(ctx->opcode)); \
908 gen_helper_##name(tcg_env, opc, xb); \
915 TCGv_ptr xt, xa, xb; \
923 xb = gen_vsr_ptr(rB(ctx->opcode) + 32); \
924 gen_helper_##name(tcg_env, opc, xt, xa, xb); \
931 TCGv_ptr xt, xb; \
938 xb = gen_vsr_ptr(rB(ctx->opcode) + 32); \
939 gen_helper_##name(tcg_env, opc, xt, xb); \
946 TCGv_ptr xa, xb; \
953 xb = gen_vsr_ptr(rB(ctx->opcode) + 32); \
954 gen_helper_##name(tcg_env, opc, xa, xb); \
1160 tcg_gen_gvec_2i(vsr_full_offset(a->xt), vsr_full_offset(a->xb),
1172 TCGv_ptr xb;
1175 xb = vsr ? gen_vsr_ptr(a->xb) : gen_avr_ptr(a->xb);
1176 gen_helper(tcg_env, tcg_constant_i32(a->bf), tcg_constant_i32(a->uim), xb);
1192 get_cpu_vsr(tmp, a->xb, true);
1268 TCGv_ptr xt, xa, xb;
1275 xb = gen_vsr_ptr(a->xb);
1277 gen_helper_VPERM(xt, xa, xt, xb);
1283 TCGv_ptr xt, xa, xb;
1290 xb = gen_vsr_ptr(a->xb);
1292 gen_helper_VPERMR(xt, xa, xt, xb);
1305 if (unlikely(a->xt == a->xa || a->xt == a->xb)) {
1309 get_cpu_vsr(t1, a->xb, (a->dm & 1) == 0);
1317 get_cpu_vsr(t0, a->xb, (a->dm & 1) == 0);
1325 TCGv_ptr xt, xa, xb, xc;
1332 xb = gen_vsr_ptr(a->xb);
1335 gen_helper_XXPERMX(xt, xa, xb, xc, tcg_constant_tl(a->uim3));
1399 return do_xsmadd(ctx, a->xt, a->xa, a->xt, a->xb, gen_helper);
1401 return do_xsmadd(ctx, a->xt, a->xa, a->xb, a->xt, gen_helper);
1584 vsr_full_offset(a->xb), 16, 16);
1631 vsr_full_offset(a->xb), vsr_full_offset(a->xa), 16, 16);
1643 bofs = vsr_full_offset(a->xb);
1748 TCGv_i64 xb, t0, t1, all_true, all_false, mask, zero;
1753 xb = tcg_temp_new_i64();
1761 get_cpu_vsr(xb, a->xb, true);
1762 tcg_gen_and_i64(t0, mask, xb);
1763 get_cpu_vsr(xb, a->xb, false);
1764 tcg_gen_and_i64(t1, mask, xb);
1838 TCGv_ptr xt, xb;
1852 xb = gen_vsr_ptr(a->xb);
1853 gen_helper(xt, xb, tcg_constant_i32(a->uim));
2134 b = gen_vsr_ptr(a->xb);
2496 xb = vsr_full_offset(a->xb), xc = vsr_full_offset(a->xc);
2508 tcg_gen_gvec_and(MO_64, xt, xb, xa, 16, 16);
2517 tcg_gen_gvec_and(MO_64, xt, xc, xb, 16, 16);
2520 tcg_gen_gvec_bitsel(MO_64, xt, xc, xb, xa, 16, 16);
2523 tcg_gen_gvec_bitsel(MO_64, xt, xb, xc, xa, 16, 16);
2526 tcg_gen_gvec_bitsel(MO_64, xt, xc, xa, xb, 16, 16);
2529 tcg_gen_gvec_mov(MO_64, xt, xb, 16, 16);
2532 tcg_gen_gvec_bitsel(MO_64, xt, xa, xc, xb, 16, 16);
2535 tcg_gen_gvec_xor(MO_64, xt, xb, xa, 16, 16);
2538 tcg_gen_gvec_or(MO_64, xt, xb, xa, 16, 16);
2541 tcg_gen_gvec_bitsel(MO_64, xt, xb, xa, xc, 16, 16);
2544 tcg_gen_gvec_bitsel(MO_64, xt, xa, xb, xc, 16, 16);
2556 tcg_gen_gvec_xor(MO_64, xt, xc, xb, 16, 16);
2559 tcg_gen_gvec_or(MO_64, xt, xc, xb, 16, 16);
2562 tcg_gen_gvec_nor(MO_64, xt, xc, xb, 16, 16);
2565 tcg_gen_gvec_eqv(MO_64, xt, xc, xb, 16, 16);
2577 tcg_gen_gvec_nor(MO_64, xt, xb, xa, 16, 16);
2580 tcg_gen_gvec_eqv(MO_64, xt, xb, xa, 16, 16);
2583 tcg_gen_gvec_not(MO_64, xt, xb, 16, 16);
2586 tcg_gen_gvec_nand(MO_64, xt, xc, xb, 16, 16);
2595 tcg_gen_gvec_nand(MO_64, xt, xb, xa, 16, 16);
2603 tcg_gen_gvec_4i(xt, xa, xb, xc, 16, 16, a->imm, &op);
2652 vsr_full_offset(a->xb), vsr_full_offset(a->xc),
2666 TCGv_ptr xt, xa, xb;
2671 xb = gen_vsr_ptr(a->xb);
2673 helper(tcg_env, xt, xa, xb);
2742 TCGv_ptr xt, xb;
2748 xb = gen_vsr_ptr(a->xb);
2750 gen_helper_XVCVSPBF16(tcg_env, xt, xb);
2759 tcg_gen_gvec_shli(MO_32, vsr_full_offset(a->xt), vsr_full_offset(a->xb),
2800 TCGv_ptr xt, xa, xb;
2803 if (unlikely((a->xa / 4 == a->xt) || (a->xb / 4 == a->xt))) {
2810 xb = gen_vsr_ptr(a->xb);
2813 helper(tcg_env, xa, xb, xt, tcg_constant_i32(mask));