target/mips/cpu-defs.c.inc

263         .CP1_fcr0 = (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) |
295         .CP1_fcr0 = (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) |
337         .CP1_fcr0 = (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) |
363         .CP1_fcr0 = (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) |
459                     (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) |
499                     (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |
540                     (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |
689                     (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |
735         .CP1_fcr0 = (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) |
773                     (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |
813                     (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |
883                     (0x1 << FCR0_PS) | (0x1 << FCR0_L) | (0x1 << FCR0_W) |
941                     (0x1 << FCR0_PS) | (0x1 << FCR0_L) | (0x1 << FCR0_W) |
981                     (1 << FCR0_L) | (1 << FCR0_W) | (1 << FCR0_D) |