2934                            bool isread, int rt, int rt2)  in do_coproc_insn()  argument
2954             syndrome = syn_cp14_rrt_trap(1, 0xe, opc1, crm, rt, rt2,  in do_coproc_insn()
2963             syndrome = syn_cp15_rrt_trap(1, 0xe, opc1, crm, rt, rt2,  in do_coproc_insn()
3130             store_reg(s, rt2, tmp);  in do_coproc_insn()
3164             tmphi = load_reg(s, rt2);  in do_coproc_insn()
3263 static void gen_load_exclusive(DisasContext *s, int rt, int rt2,  in gen_load_exclusive()  argument
3277          * address is always Rt and the one at addr+4 is Rt2, even if  in gen_load_exclusive()
3292         store_reg(s, rt2, tmp2);  in gen_load_exclusive()
3307 static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,  in gen_store_exclusive()  argument
3336         t2 = load_reg(s, rt2);  in gen_store_exclusive()
3340          * address is always Rt and the one at addr+4 is Rt2, even if  in gen_store_exclusive()
3623                    false, a->rt, a->rt2);  in trans_MCRR()
3633                    true, a->rt, a->rt2);  in trans_MRRC()
5005 static void do_ldrd_load(DisasContext *s, TCGv_i32 addr, int rt, int rt2)  in do_ldrd_load()  argument
5012      * Rt is always the word from the lower address, and Rt2 the  in do_ldrd_load()
5025      * rt if the load of rt2 faults; this is required for cases  in do_ldrd_load()
5042     store_reg(s, rt2, tmp2);  in do_ldrd_load()
5065 static void do_strd_store(DisasContext *s, TCGv_i32 addr, int rt, int rt2)  in do_strd_store()  argument
5072      * Rt is always the word from the lower address, and Rt2 the  in do_strd_store()
5087     TCGv_i32 t2 = load_reg(s, rt2);  in do_strd_store()
5210 static bool op_ldrd_ri(DisasContext *s, arg_ldst_ri *a, int rt2)  in op_ldrd_ri()  argument
5216     do_ldrd_load(s, addr, a->rt, rt2);  in op_ldrd_ri()
5237     return op_ldrd_ri(s, &b, a->rt2);  in trans_LDRD_ri_t32()
5240 static bool op_strd_ri(DisasContext *s, arg_ldst_ri *a, int rt2)  in op_strd_ri()  argument
5246     do_strd_store(s, addr, a->rt, rt2);  in op_strd_ri()
5266     return op_strd_ri(s, &b, a->rt2);  in trans_STRD_ri_t32()
5312     tmp = load_reg(s, a->rt2);  in DO_LDST()
5344             && (a->rt2 == 15  in op_strex()
5345                 || a->rd == a->rt2  in op_strex()
5346                 || (!v8a && s->thumb && a->rt2 == 13)))) {  in op_strex()
5359     gen_store_exclusive(s, a->rd, a->rt, a->rt2, addr, mop);  in op_strex()
5381     a->rt2 = a->rt + 1;  in trans_STREXD_a32()
5424     a->rt2 = a->rt + 1;  in trans_STLEXD_a32()
5499             && (a->rt2 == 15 || a->rt == a->rt2  in op_ldrex()
5500                 || (!v8a && s->thumb && a->rt2 == 13)))) {  in op_ldrex()
5509     gen_load_exclusive(s, a->rt, a->rt2, addr, mop);  in op_ldrex()
5535     a->rt2 = a->rt + 1;  in trans_LDREXD_a32()
5578     a->rt2 = a->rt + 1;  in trans_LDAEXD_a32()