Lines Matching refs:s2_mmu_idx
525 ARMMMUIdx s2_mmu_idx) in S2_security_space() argument
531 if (regime_is_stage2(s2_mmu_idx)) { in S2_security_space()
541 return arm_secure_to_space(s2_mmu_idx == ARMMMUIdx_Stage2_S); in S2_security_space()
543 assert(s2_mmu_idx != ARMMMUIdx_Stage2_S); in S2_security_space()
549 return arm_phys_to_space(s2_mmu_idx); in S2_security_space()
553 static bool fault_s1ns(ARMSecuritySpace space, ARMMMUIdx s2_mmu_idx) in fault_s1ns() argument
560 return space == ARMSS_Secure && regime_is_stage2(s2_mmu_idx) in fault_s1ns()
561 && s2_mmu_idx == ARMMMUIdx_Stage2_S; in fault_s1ns()
569 ARMMMUIdx s2_mmu_idx = ptw->in_ptw_idx; in S1_ptw_translate() local
579 ARMSecuritySpace s2_space = S2_security_space(ptw->in_space, s2_mmu_idx); in S1_ptw_translate()
581 .in_mmu_idx = s2_mmu_idx, in S1_ptw_translate()
582 .in_ptw_idx = ptw_idx_for_stage_2(env, s2_mmu_idx), in S1_ptw_translate()
604 arm_to_core_mmu_idx(s2_mmu_idx), in S1_ptw_translate()
620 if (regime_is_stage2(s2_mmu_idx)) { in S1_ptw_translate()
632 fi->s1ns = fault_s1ns(ptw->in_space, s2_mmu_idx); in S1_ptw_translate()
646 fi->stage2 = regime_is_stage2(s2_mmu_idx); in S1_ptw_translate()
648 fi->s1ns = fault_s1ns(ptw->in_space, s2_mmu_idx); in S1_ptw_translate()