hw/xtensa/xtensa-isa.h

3  * Copyright (c) 2001-2013 Tensilica Inc.
6  * a copy of this software and associated documentation files (the
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
41  * library contains most of the ISA-specific information for a
42  * particular Xtensa processor. For example, the set of valid
46  * This interface basically defines a number of abstract data types.
48  * . an instruction buffer - for holding the raw instruction bits
49  * . ISA info - information about the ISA as a whole
50  * . instruction formats - instruction size and slot structure
51  * . opcodes - information about individual instructions
52  * . operands - information about register and immediate instruction operands
53  * . stateOperands - information about processor state instruction operands
54  * . interfaceOperands - information about interface instruction operands
55  * . register files - register file information
56  * . processor states - internal processor state information
57  * . system registers - "special registers" and "user registers"
58  * . interfaces - TIE interfaces that are external to the processor
59  * . functional units - TIE shared functions
61  * The interface defines a set of functions to access each data type.
73  * specific values are only fixed for a particular instantiation of an
87 /* Define a unique value for undefined items. */
89 #define XTENSA_UNDEFINED -1
95  * Each Xtensa instruction is associated with a particular instruction
96  * format, where the format defines a fixed number of slots for
99  * there is a single opcode and some number of associated operands.
104  * individual slots in those instructions -- the contents of a slot need
106  * as a whole.
110  * separately. A slot is decoded by finding the opcode and then using
202  * must contain a valid instruction so we know how many bytes to copy;
207  * memory does not contain a valid instruction, it copies the maximum
251  * Get the number of stages in the processor's pipeline. The pipeline
253  * from 0 to N-1, where N is the value returned by this function.
255  * actual processor hardware, e.g., the hardware may have additional
262 /* Get the number of various entities that are defined for this processor. */
282 /* Get the name of a format. Returns null on error. */
288  * Given a format name, return the format number. Returns
289  * XTENSA_UNDEFINED if the name is not a valid format.
296  * Decode the instruction format from a binary instruction buffer.
304  * Set the instruction format field(s) in a binary instruction buffer.
305  * All the other fields are set to zero. Returns non-zero on error.
329  * Get the opcode for a no-op in a particular slot.
338  * Get the bits for a specified slot out of an insnbuf for the
339  * instruction as a whole and put them into an insnbuf for that one
340  * slot, and do the opposite to set a slot. Return non-zero on error.
354  * Translate a mnemonic name to an opcode. Returns XTENSA_UNDEFINED if
355  * the name is not a valid opcode mnemonic.
362  * Decode the opcode for one instruction slot from a binary instruction
373  * in the slot are set to zero. Returns non-zero if the opcode cannot
393  * loop: zero-overhead loop (LOOP*)
398  * address stored in a register. You can distinguish these by
399  * checking if the instruction has a PC-relative immediate
427  * is identified by a <functional unit, pipeline stage> pair. The
430  * a pointer to a "use" pair or null on error.
463  * "implicit", i.e., whether it is encoded in a field in the
472  * operand. Note: The output operand of a conditional assignment
486  * functions return non-zero on error, e.g., if the field is not defined
501  * be encoded in a variety of different ways. These functions hide
503  * the argument pointer. The return value is non-zero on error.
514  * An operand may be either a register operand or an immediate of some
515  * sort (e.g., PC-relative or not). The "is_register" function returns
516  * 0 if the operand is an immediate, 1 if it is a register, and
518  * regfile for a register operand, or XTENSA_UNDEFINED on error.
528  * Register operands may span multiple consecutive registers, e.g., a
529  * 64-bit data type may occupy two 32-bit registers. Only the first
532  * non-register operands, the return value is undefined. Returns
544  * treated with worst-case assumptions. The function returns 0 if the
553  * Check if an immediate operand is PC-relative. Returns 0 for register
554  * operands and non-PC-relative immediates, 1 for PC-relative
562  * For PC-relative offset operands, the interpretation of the offset may
565  * perform PC-relative relocations and to undo them (as in the
568  * corresponding PC-relative offset (which can then be encoded and
571  * appropriate address. The return values are non-zero on error. Note
588  * Get the state accessed by a state operand. Returns XTENSA_UNDEFINED
597  * Check if a state operand is an input ('i'), output ('o'), or inout
621  * Regfiles include both "real" regfiles and "views", where a view
622  * allows a group of adjacent registers in a real "parent" regfile to be
623  * viewed as a single register. A regfile view has all the same
630  * Look up a regfile by either its name or its abbreviated "short name".
643  * Get the name or abbreviated "short name" of a regfile.
653  * Get the parent regfile of a "view" regfile. If the regfile is not a
662  * Get the bit width of a regfile or regfile view.
678 /* Processor States. */
680 /* Look up a state by name. Returns XTENSA_UNDEFINED on error. */
685 /* Get the name for a processor state. Returns null on error. */
691  * Get the bit width for a processor state.
699  * Check if a state is exported from the processor core. Returns 0 if
708  * Check for a "shared_or" state. Returns 0 if the condition is false,
719  * Look up a register by its number and whether it is a "user register"
720  * or a "special register". Returns XTENSA_UNDEFINED if the sysreg does
728  * Check if there exists a sysreg with a given name.
735 /* Get the name of a sysreg. Returns null on error. */
746  * Check if a sysreg is a "special register" or a "user register".
780  * to the Xtensa processor core. Returns 0 on error.
787  * Check if accessing an interface has potential side effects.
788  * Currently "data" interfaces have side effects and "control"
789  * interfaces do not. Returns 1 if there are side effects, 0 if not,
798  * has side effects on a set of related interfaces. The interfaces
800  * each class is assigned a unique identifier number. This function
813  * Find a functional unit by name. The return value is XTENSA_UNDEFINED if
820 /* Get the name of a functional unit. Returns null on error. */
826  * Functional units may be replicated. See how many instances of a