Lines Matching refs:PPC_BITMASK32
95 #define TM_QW0W2_LOGIC_SERV PPC_BITMASK32(1, 31) /* XX 2,31 ? */
97 #define TM_QW1W2_OS_CAM PPC_BITMASK32(8, 31)
99 #define TM_QW2W2_POOL_CAM PPC_BITMASK32(8, 31)
222 #define END_W0_QSIZE PPC_BITMASK32(12, 15)
227 #define END_W0_HWDEP PPC_BITMASK32(24, 31)
229 #define END_W1_ESn PPC_BITMASK32(0, 1)
232 #define END_W1_ESe PPC_BITMASK32(2, 3)
236 #define END_W1_PAGE_OFF PPC_BITMASK32(10, 31)
238 #define END_W2_MIGRATION_REG PPC_BITMASK32(0, 3)
239 #define END_W2_OP_DESC_HI PPC_BITMASK32(4, 31)
241 #define END_W3_OP_DESC_LO PPC_BITMASK32(0, 31)
243 #define END_W4_ESC_END_BLOCK PPC_BITMASK32(4, 7)
244 #define END_W4_ESC_END_INDEX PPC_BITMASK32(8, 31)
246 #define END_W5_ESC_END_DATA PPC_BITMASK32(1, 31)
249 #define END_W6_NVT_BLOCK PPC_BITMASK32(9, 12)
250 #define END_W6_NVT_INDEX PPC_BITMASK32(13, 31)
254 #define END_W7_F0_PRIORITY PPC_BITMASK32(8, 15)
256 #define END_W7_F1_LOG_SERVER_ID PPC_BITMASK32(1, 31)
286 #define NVT_W1_EQ_BLOCK PPC_BITMASK32(0, 3)
287 #define NVT_W1_EQ_INDEX PPC_BITMASK32(4, 31)
291 #define NVT_W4_IPB PPC_BITMASK32(16, 23)