Lines Matching +full:control +full:- +full:parent

2  * Nuvoton NPCM7xx/8xx Clock Control Registers.
31 #define NPCM7XX_WATCHDOG_RESET_GPIO_IN "npcm7xx-clk-watchdog-reset-gpio-in"
88  * struct NPCM7xxClockPLLState - A PLL module in CLK module.
93  * @reg: The control registers for this PLL module.
96     DeviceState parent;  member
107  * struct NPCM7xxClockSELState - A SEL module in CLK module.
113  * @offset: The offset of this module in the control register.
114  * @len: The length of this module in the control register.
117     DeviceState parent;  member
130  * struct NPCM7xxClockDividerState - A Divider module in CLK module.
136  * @reg: The index of the control register that contains the divisor.
137  * @offset: The offset of the divisor in the control register.
138  * @len: The length of the divisor in the control register.
142     DeviceState parent;  member
161     SysBusDevice parent;  member
184     SysBusDeviceClass parent;  member
190 #define TYPE_NPCM_CLK "npcm-clk"
192 #define TYPE_NPCM7XX_CLK "npcm7xx-clk"
193 #define TYPE_NPCM8XX_CLK "npcm8xx-clk"