Lines Matching +full:control +full:- +full:parent

2  * Nuvoton NPCM7xx Clock Control Registers.
29 #define NPCM7XX_WATCHDOG_RESET_GPIO_IN "npcm7xx-clk-watchdog-reset-gpio-in"
86  * struct NPCM7xxClockPLLState - A PLL module in CLK module.
91  * @reg: The control registers for this PLL module.
94     DeviceState parent;  member
105  * struct NPCM7xxClockSELState - A SEL module in CLK module.
111  * @offset: The offset of this module in the control register.
112  * @len: The length of this module in the control register.
115     DeviceState parent;  member
128  * struct NPCM7xxClockDividerState - A Divider module in CLK module.
134  * @reg: The index of the control register that contains the divisor.
135  * @offset: The offset of the divisor in the control register.
136  * @len: The length of the divisor in the control register.
140     DeviceState parent;  member
159     SysBusDevice parent;  member
177 #define TYPE_NPCM7XX_CLK "npcm7xx-clk"