Lines Matching defs:AwH3DramCtlState

68 struct AwH3DramCtlState {  struct
70     SysBusDevice parent_obj;
74     hwaddr ram_addr;
77     uint32_t ram_size;
84     MemoryRegion row_mirror;       /**< Simulates rows for RAM size detection */
85     MemoryRegion row_mirror_alias; /**< Alias of the row which is mirrored */
86     MemoryRegion dramcom_iomem;    /**< DRAMCOM module I/O registers */
87     MemoryRegion dramctl_iomem;    /**< DRAMCTL module I/O registers */
88     MemoryRegion dramphy_iomem;    /**< DRAMPHY module I/O registers */
97     uint32_t dramcom[AW_H3_DRAMCOM_REGS_NUM]; /**< Array of DRAMCOM registers */
98     uint32_t dramctl[AW_H3_DRAMCTL_REGS_NUM]; /**< Array of DRAMCTL registers */
99     uint32_t dramphy[AW_H3_DRAMPHY_REGS_NUM] ;/**< Array of DRAMPHY registers */