Lines Matching +full:secure +full:- +full:regions

37 #define GICV3_MAXSPI (GICV3_MAXIRQ - GIC_INTERNAL)
48 /* Number of SGI target-list bits */
55  * For some distributor fields we want to model the array of 32-bit
80 /* Return a pointer to the 32-bit word containing the specified bit. */
90  * Group0, Group1 (Secure) and Group1 (NonSecure)
92  * In the state struct they are implemented as a 3-element array which
99  * must be prepared to cope with a Group 1 Secure interrupt even if it does
102  * treat an incoming Group 1 Secure interrupt as if it were Group 0.
104  * in a no-EL3 CPU:  we would otherwise have to translate back and forth
112  * group-related, so those indices are just 0 for S and 1 for NS.
227     GICv3RedistRegion *redist_regions; /* Redistributor Regions */
229     uint32_t nb_redist_regions; /* number of redist regions */
278         set_bit32(irq, s->BMP);                                         \
282         return test_bit32(irq, s->BMP);                                 \
286         clear_bit32(irq, s->BMP);                                       \
291         gic_bmp_replace_bit(irq, s->BMP, value);                        \
303 #define TYPE_ARM_GICV3_COMMON "arm-gicv3-common"