Lines Matching defs:XlnxZynqMPState

96 struct XlnxZynqMPState {  struct
98     DeviceState parent_obj;
101     CPUClusterState apu_cluster;
102     CPUClusterState rpu_cluster;
103     ARMCPU apu_cpu[XLNX_ZYNQMP_NUM_APU_CPUS];
104     ARMCPU rpu_cpu[XLNX_ZYNQMP_NUM_RPU_CPUS];
105     GICState gic;
106     MemoryRegion gic_mr[XLNX_ZYNQMP_GIC_REGIONS][XLNX_ZYNQMP_GIC_ALIASES];
108     MemoryRegion ocm_ram[XLNX_ZYNQMP_NUM_OCM_BANKS];
110     MemoryRegion *ddr_ram;
111     MemoryRegion ddr_ram_low, ddr_ram_high;
112     XlnxBBRam bbram;
113     XlnxEFuse efuse;
114     XlnxZynqMPEFuse efuse_ctrl;
116     MemoryRegion mr_unimp[XLNX_ZYNQMP_NUM_UNIMP_AREAS];
118     CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS];
119     OrIRQState gem_irq_orgate[XLNX_ZYNQMP_NUM_GEMS];
120     CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];
121     XlnxZynqMPCANState can[XLNX_ZYNQMP_NUM_CAN];
122     SysbusAHCIState sata;
123     SDHCIState sdhci[XLNX_ZYNQMP_NUM_SDHCI];
124     XilinxSPIPS spi[XLNX_ZYNQMP_NUM_SPIS];
125     XlnxZynqMPQSPIPS qspi;
126     XlnxDPState dp;
127     XlnxDPDMAState dpdma;
128     XlnxZynqMPIPI ipi;
129     XlnxZynqMPRTC rtc;
130     XlnxZDMA gdma[XLNX_ZYNQMP_NUM_GDMA_CH];
131     XlnxZDMA adma[XLNX_ZYNQMP_NUM_ADMA_CH];
132     XlnxCSUDMA qspi_dma;
133     OrIRQState qspi_irq_orgate;
134     XlnxZynqMPAPUCtrl apu_ctrl;
135     XlnxZynqMPCRF crf;
136     CadenceTTCState ttc[XLNX_ZYNQMP_NUM_TTC];
137     USBDWC3 usb[XLNX_ZYNQMP_NUM_USB];
139     char *boot_cpu;
140     ARMCPU *boot_cpu_ptr;
143     bool secure;
145     bool virt;
148     CanBusState *canbus[XLNX_ZYNQMP_NUM_CAN];