Lines Matching +full:reset +full:- +full:name
7 * only supporting core reset and read of ID register.
36 #include "hw/qdev-properties.h"
37 #include "hw/usb/hcd-dwc3.h"
354 * We reset all CSR regs except GCTL, GUCTL, GSTS, GSNPSID, GGPIO, GUID, in reset_csr()
377 register_reset(&s->regs_info[i]); in reset_csr()
382 xhci_sysbus_reset(DEVICE(&s->sysbus_xhci)); in reset_csr()
387 USBDWC3 *s = USB_DWC3(reg->opaque); in usb_dwc3_gctl_postw()
389 if (ARRAY_FIELD_EX32(s->regs, GCTL, CORESOFTRESET)) { in usb_dwc3_gctl_postw()
396 USBDWC3 *s = USB_DWC3(reg->opaque); in usb_dwc3_guid_postw()
398 s->regs[R_GUID] = s->cfg.dwc_usb3_user; in usb_dwc3_guid_postw()
402 { .name = "GSBUSCFG0", .addr = A_GSBUSCFG0,
405 },{ .name = "GSBUSCFG1", .addr = A_GSBUSCFG1,
406 .reset = 0x300,
409 },{ .name = "GTXTHRCFG", .addr = A_GTXTHRCFG,
412 },{ .name = "GRXTHRCFG", .addr = A_GRXTHRCFG,
415 },{ .name = "GCTL", .addr = A_GCTL,
416 .reset = 0x30c13004, .post_write = usb_dwc3_gctl_postw,
417 },{ .name = "GPMSTS", .addr = A_GPMSTS,
420 },{ .name = "GSTS", .addr = A_GSTS,
421 .reset = 0x7e800000,
425 },{ .name = "GUCTL1", .addr = A_GUCTL1,
426 .reset = 0x198a,
429 },{ .name = "GSNPSID", .addr = A_GSNPSID,
430 .reset = 0x5533330a,
432 },{ .name = "GGPIO", .addr = A_GGPIO,
435 },{ .name = "GUID", .addr = A_GUID,
436 .reset = 0x12345678, .post_write = usb_dwc3_guid_postw,
437 },{ .name = "GUCTL", .addr = A_GUCTL,
438 .reset = 0x0c808010,
441 },{ .name = "GBUSERRADDRLO", .addr = A_GBUSERRADDRLO,
443 },{ .name = "GBUSERRADDRHI", .addr = A_GBUSERRADDRHI,
445 },{ .name = "GHWPARAMS0", .addr = A_GHWPARAMS0,
447 },{ .name = "GHWPARAMS1", .addr = A_GHWPARAMS1,
449 },{ .name = "GHWPARAMS2", .addr = A_GHWPARAMS2,
451 },{ .name = "GHWPARAMS3", .addr = A_GHWPARAMS3,
453 },{ .name = "GHWPARAMS4", .addr = A_GHWPARAMS4,
455 },{ .name = "GHWPARAMS5", .addr = A_GHWPARAMS5,
457 },{ .name = "GHWPARAMS6", .addr = A_GHWPARAMS6,
459 },{ .name = "GHWPARAMS7", .addr = A_GHWPARAMS7,
461 },{ .name = "GDBGFIFOSPACE", .addr = A_GDBGFIFOSPACE,
462 .reset = 0xa0000,
465 },{ .name = "GUCTL2", .addr = A_GUCTL2,
466 .reset = 0x40d,
469 },{ .name = "GUSB2PHYCFG", .addr = A_GUSB2PHYCFG,
470 .reset = 0x40102410,
473 },{ .name = "GUSB2I2CCTL", .addr = A_GUSB2I2CCTL,
476 },{ .name = "GUSB2PHYACC_ULPI", .addr = A_GUSB2PHYACC_ULPI,
479 },{ .name = "GTXFIFOSIZ0", .addr = A_GTXFIFOSIZ0,
480 .reset = 0x2c7000a,
482 },{ .name = "GTXFIFOSIZ1", .addr = A_GTXFIFOSIZ1,
483 .reset = 0x2d10103,
485 },{ .name = "GTXFIFOSIZ2", .addr = A_GTXFIFOSIZ2,
486 .reset = 0x3d40103,
488 },{ .name = "GTXFIFOSIZ3", .addr = A_GTXFIFOSIZ3,
489 .reset = 0x4d70083,
491 },{ .name = "GTXFIFOSIZ4", .addr = A_GTXFIFOSIZ4,
492 .reset = 0x55a0083,
494 },{ .name = "GTXFIFOSIZ5", .addr = A_GTXFIFOSIZ5,
495 .reset = 0x5dd0083,
497 },{ .name = "GRXFIFOSIZ0", .addr = A_GRXFIFOSIZ0,
498 .reset = 0x1c20105,
500 },{ .name = "GRXFIFOSIZ1", .addr = A_GRXFIFOSIZ1,
501 .reset = 0x2c70000,
503 },{ .name = "GRXFIFOSIZ2", .addr = A_GRXFIFOSIZ2,
504 .reset = 0x2c70000,
506 },{ .name = "GEVNTADRLO_0", .addr = A_GEVNTADRLO_0,
508 },{ .name = "GEVNTADRHI_0", .addr = A_GEVNTADRHI_0,
510 },{ .name = "GEVNTSIZ_0", .addr = A_GEVNTSIZ_0,
513 },{ .name = "GEVNTCOUNT_0", .addr = A_GEVNTCOUNT_0,
516 },{ .name = "GEVNTADRLO_1", .addr = A_GEVNTADRLO_1,
518 },{ .name = "GEVNTADRHI_1", .addr = A_GEVNTADRHI_1,
520 },{ .name = "GEVNTSIZ_1", .addr = A_GEVNTSIZ_1,
523 },{ .name = "GEVNTCOUNT_1", .addr = A_GEVNTCOUNT_1,
526 },{ .name = "GEVNTADRLO_2", .addr = A_GEVNTADRLO_2,
528 },{ .name = "GEVNTADRHI_2", .addr = A_GEVNTADRHI_2,
530 },{ .name = "GEVNTSIZ_2", .addr = A_GEVNTSIZ_2,
533 },{ .name = "GEVNTCOUNT_2", .addr = A_GEVNTCOUNT_2,
536 },{ .name = "GEVNTADRLO_3", .addr = A_GEVNTADRLO_3,
538 },{ .name = "GEVNTADRHI_3", .addr = A_GEVNTADRHI_3,
540 },{ .name = "GEVNTSIZ_3", .addr = A_GEVNTSIZ_3,
543 },{ .name = "GEVNTCOUNT_3", .addr = A_GEVNTCOUNT_3,
546 },{ .name = "GHWPARAMS8", .addr = A_GHWPARAMS8,
548 },{ .name = "GTXFIFOPRIDEV", .addr = A_GTXFIFOPRIDEV,
551 },{ .name = "GTXFIFOPRIHST", .addr = A_GTXFIFOPRIHST,
554 },{ .name = "GRXFIFOPRIHST", .addr = A_GRXFIFOPRIHST,
557 },{ .name = "GDMAHLRATIO", .addr = A_GDMAHLRATIO,
560 },{ .name = "GFLADJ", .addr = A_GFLADJ,
561 .reset = 0xc83f020,
565 },{ .name = "GUSB2RHBCTL", .addr = A_GUSB2RHBCTL,
576 for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) { in usb_dwc3_reset()
583 register_reset(&s->regs_info[i]); in usb_dwc3_reset()
587 xhci_sysbus_reset(DEVICE(&s->sysbus_xhci)); in usb_dwc3_reset()
606 sysbus_realize(SYS_BUS_DEVICE(&s->sysbus_xhci), &err); in usb_dwc3_realize()
612 memory_region_add_subregion(&s->iomem, 0, in usb_dwc3_realize()
613 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sysbus_xhci), 0)); in usb_dwc3_realize()
614 sysbus_init_mmio(sbd, &s->iomem); in usb_dwc3_realize()
619 s->regs[R_GHWPARAMS0] = 0x40204048 | s->cfg.mode; in usb_dwc3_realize()
620 s->regs[R_GHWPARAMS1] = 0x222493b; in usb_dwc3_realize()
621 s->regs[R_GHWPARAMS2] = 0x12345678; in usb_dwc3_realize()
622 s->regs[R_GHWPARAMS3] = 0x618c088; in usb_dwc3_realize()
623 s->regs[R_GHWPARAMS4] = 0x47822004; in usb_dwc3_realize()
624 s->regs[R_GHWPARAMS5] = 0x4202088; in usb_dwc3_realize()
625 s->regs[R_GHWPARAMS6] = 0x7850c20; in usb_dwc3_realize()
626 s->regs[R_GHWPARAMS7] = 0x0; in usb_dwc3_realize()
627 s->regs[R_GHWPARAMS8] = 0x478; in usb_dwc3_realize()
635 memory_region_init(&s->iomem, obj, TYPE_USB_DWC3, DWC3_SIZE); in usb_dwc3_init()
639 s->regs_info, s->regs, in usb_dwc3_init()
643 memory_region_add_subregion(&s->iomem, in usb_dwc3_init()
645 ®_array->mem); in usb_dwc3_init()
646 object_initialize_child(obj, "dwc3-xhci", &s->sysbus_xhci, in usb_dwc3_init()
648 qdev_alias_all_properties(DEVICE(&s->sysbus_xhci), obj); in usb_dwc3_init()
650 s->cfg.mode = HOST_MODE; in usb_dwc3_init()
654 .name = "usb-dwc3",
674 dc->realize = usb_dwc3_realize; in usb_dwc3_class_init()
675 dc->vmsd = &vmstate_usb_dwc3; in usb_dwc3_class_init()
680 .name = TYPE_USB_DWC3,