126     if (s->hreg1[index + 2] & s->hreg1[index + 3]) {  in dwc2_update_hc_irq()
227     uint32_t hcchar = s->hreg1[index];  in dwc2_handle_packet()
228     uint32_t hctsiz = s->hreg1[index + 4];  in dwc2_handle_packet()
229     uint32_t hcdma = s->hreg1[index + 5];  in dwc2_handle_packet()
350         s->hreg1[index + 4] = hctsiz;  in dwc2_handle_packet()
352         s->hreg1[index + 5] = hcdma;  in dwc2_handle_packet()
367             s->hreg1[index + 2] |= intr;  in dwc2_handle_packet()
379         s->hreg1[index] = hcchar;  in dwc2_handle_packet()
384         s->hreg1[index + 2] |= intr;  in dwc2_handle_packet()
622     hcchar = s->hreg1[index];  in dwc2_enable_chan()
623     hctsiz = s->hreg1[index + 4];  in dwc2_enable_chan()
980     val = s->hreg1[index];  in dwc2_hreg1_read()
1003     mmio = &s->hreg1[index];  in dwc2_hreg1_write()
1046         s->hreg1[(index & ~7) + 2] |= HCINTMSK_CHHLTD;  in dwc2_hreg1_write()
1299     memset(s->hreg1, 0, sizeof(s->hreg1));  in dwc2_reset_enter()
1426         VMSTATE_UINT32_ARRAY(hreg1, DWC2State,