Lines Matching +full:b +full:- +full:facing
31 #include "hw/pci-host/i440fx.h"
32 #include "hw/qdev-properties.h"
37 #include "qemu/error-report.h"
77 dev->config[I440FX_SMRAM] = 0x02; in i440fx_realize()
90 for (i = 0; i < ARRAY_SIZE(d->pam_regions); i++) { in i440fx_update_memory_mappings()
91 pam_update(&d->pam_regions[i], i, in i440fx_update_memory_mappings()
92 pd->config[I440FX_PAM + DIV_ROUND_UP(i, 2)]); in i440fx_update_memory_mappings()
94 memory_region_set_enabled(&d->smram_region, in i440fx_update_memory_mappings()
95 !(pd->config[I440FX_SMRAM] & SMRAM_D_OPEN)); in i440fx_update_memory_mappings()
96 memory_region_set_enabled(&d->smram, in i440fx_update_memory_mappings()
97 pd->config[I440FX_SMRAM] & SMRAM_G_SMRAME); in i440fx_update_memory_mappings()
146 val64 = range_is_empty(&s->pci_hole) ? 0 : range_lob(&s->pci_hole); in i440fx_pcihost_get_pci_hole_start()
160 val64 = range_is_empty(&s->pci_hole) ? 0 : range_upb(&s->pci_hole) + 1; in i440fx_pcihost_get_pci_hole_end()
180 pci_bus_get_w64_range(h->bus, &w64); in i440fx_pcihost_get_pci_hole64_start_value()
182 if (!value && s->pci_hole64_fix) { in i440fx_pcihost_get_pci_hole64_start_value()
213 pci_bus_get_w64_range(h->bus, &w64); in i440fx_pcihost_get_pci_hole64_end()
215 hole64_end = ROUND_UP(hole64_start + s->pci_hole64_size, 1ULL << 30); in i440fx_pcihost_get_pci_hole64_end()
216 if (s->pci_hole64_fix && value < hole64_end) { in i440fx_pcihost_get_pci_hole64_end()
227 memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb, in i440fx_pcihost_initfn()
228 "pci-conf-idx", 4); in i440fx_pcihost_initfn()
229 memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, in i440fx_pcihost_initfn()
230 "pci-conf-data", 4); in i440fx_pcihost_initfn()
233 (Object **) &s->ram_memory, in i440fx_pcihost_initfn()
237 (Object **) &s->pci_address_space, in i440fx_pcihost_initfn()
241 (Object **) &s->system_memory, in i440fx_pcihost_initfn()
245 (Object **) &s->io_memory, in i440fx_pcihost_initfn()
255 PCIBus *b; in i440fx_pcihost_realize() local
260 memory_region_add_subregion(s->io_memory, 0xcf8, &phb->conf_mem); in i440fx_pcihost_realize()
263 memory_region_add_subregion(s->io_memory, 0xcfc, &phb->data_mem); in i440fx_pcihost_realize()
267 memory_region_set_flush_coalesced(&phb->data_mem); in i440fx_pcihost_realize()
268 memory_region_add_coalescing(&phb->conf_mem, 0, 4); in i440fx_pcihost_realize()
270 b = pci_root_bus_new(dev, NULL, s->pci_address_space, in i440fx_pcihost_realize()
271 s->io_memory, 0, TYPE_PCI_BUS); in i440fx_pcihost_realize()
272 phb->bus = b; in i440fx_pcihost_realize()
274 d = pci_create_simple(b, 0, s->pci_type); in i440fx_pcihost_realize()
277 range_set_bounds(&s->pci_hole, s->below_4g_mem_size, in i440fx_pcihost_realize()
278 IO_APIC_DEFAULT_ADDRESS - 1); in i440fx_pcihost_realize()
281 pc_pci_as_mapping_init(s->system_memory, s->pci_address_space); in i440fx_pcihost_realize()
284 memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region", in i440fx_pcihost_realize()
285 s->pci_address_space, SMRAM_C_BASE, SMRAM_C_SIZE); in i440fx_pcihost_realize()
286 memory_region_add_subregion_overlap(s->system_memory, SMRAM_C_BASE, in i440fx_pcihost_realize()
287 &f->smram_region, 1); in i440fx_pcihost_realize()
288 memory_region_set_enabled(&f->smram_region, true); in i440fx_pcihost_realize()
291 memory_region_init(&f->smram, OBJECT(d), "smram", 4 * GiB); in i440fx_pcihost_realize()
292 memory_region_set_enabled(&f->smram, true); in i440fx_pcihost_realize()
293 memory_region_init_alias(&f->low_smram, OBJECT(d), "smram-low", in i440fx_pcihost_realize()
294 s->ram_memory, SMRAM_C_BASE, SMRAM_C_SIZE); in i440fx_pcihost_realize()
295 memory_region_set_enabled(&f->low_smram, true); in i440fx_pcihost_realize()
296 memory_region_add_subregion(&f->smram, SMRAM_C_BASE, &f->low_smram); in i440fx_pcihost_realize()
298 OBJECT(&f->smram)); in i440fx_pcihost_realize()
300 init_pam(&f->pam_regions[0], OBJECT(d), s->ram_memory, s->system_memory, in i440fx_pcihost_realize()
301 s->pci_address_space, PAM_BIOS_BASE, PAM_BIOS_SIZE); in i440fx_pcihost_realize()
302 for (i = 0; i < ARRAY_SIZE(f->pam_regions) - 1; ++i) { in i440fx_pcihost_realize()
303 init_pam(&f->pam_regions[i + 1], OBJECT(d), s->ram_memory, in i440fx_pcihost_realize()
304 s->system_memory, s->pci_address_space, in i440fx_pcihost_realize()
308 ram_addr_t ram_size = s->below_4g_mem_size + s->above_4g_mem_size; in i440fx_pcihost_realize()
313 d->config[I440FX_COREBOOT_RAM_SIZE] = ram_size; in i440fx_pcihost_realize()
323 k->realize = i440fx_realize; in i440fx_class_init()
324 k->config_write = i440fx_write_config; in i440fx_class_init()
325 k->vendor_id = PCI_VENDOR_ID_INTEL; in i440fx_class_init()
326 k->device_id = PCI_DEVICE_ID_INTEL_82441; in i440fx_class_init()
327 k->revision = 0x02; in i440fx_class_init()
328 k->class_id = PCI_CLASS_BRIDGE_HOST; in i440fx_class_init()
329 dc->desc = "Host bridge"; in i440fx_class_init()
330 dc->vmsd = &vmstate_i440fx; in i440fx_class_init()
332 * PCI-facing part of the host bridge, not usable without the in i440fx_class_init()
333 * host-facing part, which can't be device_add'ed, yet. in i440fx_class_init()
335 dc->user_creatable = false; in i440fx_class_init()
336 dc->hotpluggable = false; in i440fx_class_init()
363 DEFINE_PROP_BOOL("x-pci-hole64-fix", I440FXState, pci_hole64_fix, true),
373 hc->root_bus_path = i440fx_pcihost_root_bus_path; in i440fx_pcihost_class_init()
374 dc->realize = i440fx_pcihost_realize; in i440fx_pcihost_class_init()
375 dc->fw_name = "pci"; in i440fx_pcihost_class_init()
378 dc->user_creatable = false; in i440fx_pcihost_class_init()