Lines Matching +full:bm +full:- +full:work

2  * HP-PARISC Dino PCI chipset emulation, as in B160L and similar machines
4 * (C) 2017-2019 by Helge Deller <deller@gmx.de>
6 * This work is licensed under the GNU GPL license version 2 or later.
9 * https://parisc.wiki.kernel.org/images-parisc/9/91/Dino_ers.pdf
10 * https://parisc.wiki.kernel.org/images-parisc/7/70/Dino_3_1_Errata.pdf
20 #include "hw/qdev-properties.h"
21 #include "hw/pci-host/dino.h"
36 tmp = extract32(s->io_control, 7, 2); in gsc_to_pci_forwarding()
38 io_addr_en = s->io_addr_en; in gsc_to_pci_forwarding()
44 MemoryRegion *mem = &s->pci_mem_alias[i]; in gsc_to_pci_forwarding()
108 ioaddr = phb->config_reg + (addr & 3); in dino_chip_read_with_attrs()
125 val = s->io_fbb_en; in dino_chip_read_with_attrs()
128 val = s->io_addr_en; in dino_chip_read_with_attrs()
131 val = s->io_control; in dino_chip_read_with_attrs()
135 val = s->iar0; in dino_chip_read_with_attrs()
138 val = s->iar1; in dino_chip_read_with_attrs()
141 val = s->imr; in dino_chip_read_with_attrs()
144 val = s->icr; in dino_chip_read_with_attrs()
147 val = s->ipr; in dino_chip_read_with_attrs()
149 s->ipr = 0; in dino_chip_read_with_attrs()
152 val = s->ilr; in dino_chip_read_with_attrs()
155 val = s->ilr & s->imr & ~s->icr; in dino_chip_read_with_attrs()
158 val = s->ilr & s->imr & s->icr; in dino_chip_read_with_attrs()
161 val = s->toc_addr; in dino_chip_read_with_attrs()
164 val = s->reg800[(addr - DINO_GMASK) / 4]; in dino_chip_read_with_attrs()
172 val &= ~(0x10710E0ul | 8); /* bits 5-7, 24 & 15 reserved */ in dino_chip_read_with_attrs()
203 ioaddr = phb->config_reg + (addr & 3); in dino_chip_write_with_attrs()
220 s->io_fbb_en = val & 0x03; in dino_chip_write_with_attrs()
223 s->io_addr_en = val; in dino_chip_write_with_attrs()
227 s->io_control = val; in dino_chip_write_with_attrs()
232 s->iar0 = val; in dino_chip_write_with_attrs()
235 s->iar1 = val; in dino_chip_write_with_attrs()
238 s->imr = val; in dino_chip_write_with_attrs()
241 s->icr = val; in dino_chip_write_with_attrs()
245 s->ipr = 0; in dino_chip_write_with_attrs()
249 s->toc_addr = 0xFFFA0030 | (val & 0x1e000); in dino_chip_write_with_attrs()
255 /* These registers are read-only. */ in dino_chip_write_with_attrs()
259 i = (addr - DINO_GMASK) / 4; in dino_chip_write_with_attrs()
261 s->reg800[i] = val; in dino_chip_write_with_attrs()
310 return pci_data_read(s->bus, s->config_reg | (addr & 3), len); in dino_config_data_read()
317 pci_data_write(s->bus, s->config_reg | (addr & 3), val, len); in dino_config_data_write()
329 return s->config_reg_dino; in dino_config_addr_read()
337 ds->config_reg_dino = val; /* keep a copy of original value */ in dino_config_addr_write()
338 s->config_reg = val & ~3U; in dino_config_addr_write()
354 return &s->bm_as; in dino_pcihost_set_iommu()
363 * (Little-endian bit numbers)
381 uint32_t old_ilr = s->ilr; in dino_set_irq()
385 s->ipr |= ena; in dino_set_irq()
386 s->ilr = old_ilr | bit; in dino_set_irq()
387 if (ena & s->imr) { in dino_set_irq()
388 uint32_t iar = (ena & s->icr ? s->iar1 : s->iar0); in dino_set_irq()
389 stl_be_phys(&address_space_memory, iar & -32, iar & 31); in dino_set_irq()
392 s->ilr = old_ilr & ~bit; in dino_set_irq()
398 int slot = PCI_SLOT(d->devfn); in dino_pci_map_irq()
409 s->iar0 = s->iar1 = 0xFFFB0000 + 3; /* CPU_HPA + 3 */ in dino_pcihost_reset()
410 s->toc_addr = 0xFFFA0030; /* IO_COMMAND of CPU */ in dino_pcihost_reset()
418 memory_region_init(&s->bm, OBJECT(s), "bm-dino", 4 * GiB); in dino_pcihost_realize()
419 memory_region_init_alias(&s->bm_ram_alias, OBJECT(s), in dino_pcihost_realize()
420 "bm-system", s->memory_as, 0, in dino_pcihost_realize()
422 memory_region_init_alias(&s->bm_pci_alias, OBJECT(s), in dino_pcihost_realize()
423 "bm-pci", &s->pci_mem, in dino_pcihost_realize()
426 memory_region_init_alias(&s->bm_cpu_alias, OBJECT(s), in dino_pcihost_realize()
427 "bm-cpu", s->memory_as, 0xfff00000, in dino_pcihost_realize()
429 memory_region_add_subregion(&s->bm, 0, in dino_pcihost_realize()
430 &s->bm_ram_alias); in dino_pcihost_realize()
431 memory_region_add_subregion(&s->bm, in dino_pcihost_realize()
433 &s->bm_pci_alias); in dino_pcihost_realize()
434 memory_region_add_subregion(&s->bm, 0xfff00000, in dino_pcihost_realize()
435 &s->bm_cpu_alias); in dino_pcihost_realize()
437 address_space_init(&s->bm_as, &s->bm, "pci-bm"); in dino_pcihost_realize()
444 address_space_destroy(&s->bm_as); in dino_pcihost_unrealize()
455 memory_region_init_io(&s->this_mem, OBJECT(s), &dino_chip_ops, in dino_pcihost_init()
459 memory_region_init_io(&phb->conf_mem, OBJECT(phb), in dino_pcihost_init()
461 "pci-conf-idx", 4); in dino_pcihost_init()
462 memory_region_init_io(&phb->data_mem, OBJECT(phb), in dino_pcihost_init()
464 "pci-conf-data", 4); in dino_pcihost_init()
465 memory_region_add_subregion(&s->this_mem, DINO_PCI_CONFIG_ADDR, in dino_pcihost_init()
466 &phb->conf_mem); in dino_pcihost_init()
467 memory_region_add_subregion(&s->this_mem, DINO_CONFIG_DATA, in dino_pcihost_init()
468 &phb->data_mem); in dino_pcihost_init()
471 memory_region_init(&s->pci_mem, OBJECT(s), "pci-memory", 4 * GiB); in dino_pcihost_init()
473 phb->bus = pci_register_root_bus(DEVICE(s), "pci", in dino_pcihost_init()
475 &s->pci_mem, get_system_io(), in dino_pcihost_init()
482 memory_region_init_alias(&s->pci_mem_alias[i], OBJECT(s), in dino_pcihost_init()
483 name, &s->pci_mem, addr, in dino_pcihost_init()
488 pci_setup_iommu(phb->bus, &dino_iommu_ops, s); in dino_pcihost_init()
490 sysbus_init_mmio(sbd, &s->this_mem); in dino_pcihost_init()
496 DEFINE_PROP_LINK("memory-as", DinoState, memory_as, TYPE_MEMORY_REGION,
506 dc->realize = dino_pcihost_realize; in dino_pcihost_class_init()
507 dc->unrealize = dino_pcihost_unrealize; in dino_pcihost_class_init()
509 dc->vmsd = &vmstate_dino; in dino_pcihost_class_init()