14  * See the COPYING file in the top-level directory.
53  * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
67  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
72  * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
77     u64            TSOPktsTxOK;  /* TSO pkts post-segmentation */
92     /* the following counters are for pkts from the wire, i.e., pre-LRO */
168 #define VMXNET3_REG_ALIGN       8    /* All registers are 8-byte aligned. */
209  *    Little Endian layout of bitfields -
211  *    Byte 1 :    rsvd gen 13.len.8
213  *    Byte 3 :     13...msscof...6
215  *    Big Endian layout of bitfields -
218  *    Byte 2 :    rsvd gen 13.len.8
219  *    Byte 3 :    7.....len.....0
236             u32 gen:1;      /* generation bit */  member
240             u32 gen:1;      /* generation bit */
277 #define VMXNET3_OM_TSO        3
283 #define VMXNET3_TXD_EOP_DWORD_SHIFT 3
301 #define VMXNET3_TCD_GEN_DWORD_SHIFT    3
322             u32 gen:1;        /* generation bit */  member
328             u32 gen:1;        /* generation bit */
340             u32 gen:1;        /* Generation bit */  member
350             u32 gen:1;        /* Generation bit */
414             u32 gen:1;        /* generation bit */  member
436             u32 gen:1;        /* generation bit */
443 /* fields in RxCompDesc we access via Vmxnet3_GenericDesc.dword[3] */
462     VMXNET3_RCD_RSS_TYPE_IPV6     = 3,
484 #define VMXNET3_TXD_NEEDED(size) (((size) + VMXNET3_MAX_TX_BUF_SIZE - 1) / \
487 /* max # of tx descs for a non-tso pkt */
491 #define VMXNET3_MAX_RX_BUF_SIZE  ((1 << 14) - 1)
498 #define VMXNET3_RING_BA_MASK    (VMXNET3_RING_BA_ALIGN - 1)
502 #define VMXNET3_RING_SIZE_MASK  (VMXNET3_RING_SIZE_ALIGN - 1)
525 #define VMXNET3_CDTYPE_RXCOMP      3    /* Rx Completion Descriptor */
536 #define VMXNET3_GOS_TYPE_SOLARIS    3
545     u32        gosBits:2;    /* 32-bit or 64-bit? */
547     u32        gosBits:2;     /* 32-bit or 64-bit? */
626     VMXNET3_IT_MSIX = 3
654     u8        _pad[3];
744     /* read-only region for device, read by dev in response to a SET cmd */
767 #define VMXNET3_ECR_DIC         (1 << 3)
770 /* flip the gen bit of a ring */
771 #define VMXNET3_FLIP_RING_GEN(gen) ((gen) = (gen) ^ 0x1)  argument
773 /* only use this if moving the idx won't affect the gen bit */