Lines Matching full:field
41 FIELD(MIO_PIN_0, L3_SEL, 7, 3)
42 FIELD(MIO_PIN_0, L2_SEL, 5, 2)
43 FIELD(MIO_PIN_0, L1_SEL, 3, 2)
44 FIELD(MIO_PIN_0, L0_SEL, 1, 2)
46 FIELD(MIO_PIN_1, L3_SEL, 7, 3)
47 FIELD(MIO_PIN_1, L2_SEL, 5, 2)
48 FIELD(MIO_PIN_1, L1_SEL, 3, 2)
49 FIELD(MIO_PIN_1, L0_SEL, 1, 2)
51 FIELD(MIO_PIN_2, L3_SEL, 7, 3)
52 FIELD(MIO_PIN_2, L2_SEL, 5, 2)
53 FIELD(MIO_PIN_2, L1_SEL, 3, 2)
54 FIELD(MIO_PIN_2, L0_SEL, 1, 2)
56 FIELD(MIO_PIN_3, L3_SEL, 7, 3)
57 FIELD(MIO_PIN_3, L2_SEL, 5, 2)
58 FIELD(MIO_PIN_3, L1_SEL, 3, 2)
59 FIELD(MIO_PIN_3, L0_SEL, 1, 2)
61 FIELD(MIO_PIN_4, L3_SEL, 7, 3)
62 FIELD(MIO_PIN_4, L2_SEL, 5, 2)
63 FIELD(MIO_PIN_4, L1_SEL, 3, 2)
64 FIELD(MIO_PIN_4, L0_SEL, 1, 2)
66 FIELD(MIO_PIN_5, L3_SEL, 7, 3)
67 FIELD(MIO_PIN_5, L2_SEL, 5, 2)
68 FIELD(MIO_PIN_5, L1_SEL, 3, 2)
69 FIELD(MIO_PIN_5, L0_SEL, 1, 2)
71 FIELD(MIO_PIN_6, L3_SEL, 7, 3)
72 FIELD(MIO_PIN_6, L2_SEL, 5, 2)
73 FIELD(MIO_PIN_6, L1_SEL, 3, 2)
74 FIELD(MIO_PIN_6, L0_SEL, 1, 2)
76 FIELD(MIO_PIN_7, L3_SEL, 7, 3)
77 FIELD(MIO_PIN_7, L2_SEL, 5, 2)
78 FIELD(MIO_PIN_7, L1_SEL, 3, 2)
79 FIELD(MIO_PIN_7, L0_SEL, 1, 2)
81 FIELD(MIO_PIN_8, L3_SEL, 7, 3)
82 FIELD(MIO_PIN_8, L2_SEL, 5, 2)
83 FIELD(MIO_PIN_8, L1_SEL, 3, 2)
84 FIELD(MIO_PIN_8, L0_SEL, 1, 2)
86 FIELD(MIO_PIN_9, L3_SEL, 7, 3)
87 FIELD(MIO_PIN_9, L2_SEL, 5, 2)
88 FIELD(MIO_PIN_9, L1_SEL, 3, 2)
89 FIELD(MIO_PIN_9, L0_SEL, 1, 2)
91 FIELD(MIO_PIN_10, L3_SEL, 7, 3)
92 FIELD(MIO_PIN_10, L2_SEL, 5, 2)
93 FIELD(MIO_PIN_10, L1_SEL, 3, 2)
94 FIELD(MIO_PIN_10, L0_SEL, 1, 2)
96 FIELD(MIO_PIN_11, L3_SEL, 7, 3)
97 FIELD(MIO_PIN_11, L2_SEL, 5, 2)
98 FIELD(MIO_PIN_11, L1_SEL, 3, 2)
99 FIELD(MIO_PIN_11, L0_SEL, 1, 2)
101 FIELD(MIO_PIN_12, L3_SEL, 7, 3)
102 FIELD(MIO_PIN_12, L2_SEL, 5, 2)
103 FIELD(MIO_PIN_12, L1_SEL, 3, 2)
104 FIELD(MIO_PIN_12, L0_SEL, 1, 2)
106 FIELD(MIO_PIN_13, L3_SEL, 7, 3)
107 FIELD(MIO_PIN_13, L2_SEL, 5, 2)
108 FIELD(MIO_PIN_13, L1_SEL, 3, 2)
109 FIELD(MIO_PIN_13, L0_SEL, 1, 2)
111 FIELD(MIO_PIN_14, L3_SEL, 7, 3)
112 FIELD(MIO_PIN_14, L2_SEL, 5, 2)
113 FIELD(MIO_PIN_14, L1_SEL, 3, 2)
114 FIELD(MIO_PIN_14, L0_SEL, 1, 2)
116 FIELD(MIO_PIN_15, L3_SEL, 7, 3)
117 FIELD(MIO_PIN_15, L2_SEL, 5, 2)
118 FIELD(MIO_PIN_15, L1_SEL, 3, 2)
119 FIELD(MIO_PIN_15, L0_SEL, 1, 2)
121 FIELD(MIO_PIN_16, L3_SEL, 7, 3)
122 FIELD(MIO_PIN_16, L2_SEL, 5, 2)
123 FIELD(MIO_PIN_16, L1_SEL, 3, 2)
124 FIELD(MIO_PIN_16, L0_SEL, 1, 2)
126 FIELD(MIO_PIN_17, L3_SEL, 7, 3)
127 FIELD(MIO_PIN_17, L2_SEL, 5, 2)
128 FIELD(MIO_PIN_17, L1_SEL, 3, 2)
129 FIELD(MIO_PIN_17, L0_SEL, 1, 2)
131 FIELD(MIO_PIN_18, L3_SEL, 7, 3)
132 FIELD(MIO_PIN_18, L2_SEL, 5, 2)
133 FIELD(MIO_PIN_18, L1_SEL, 3, 2)
134 FIELD(MIO_PIN_18, L0_SEL, 1, 2)
136 FIELD(MIO_PIN_19, L3_SEL, 7, 3)
137 FIELD(MIO_PIN_19, L2_SEL, 5, 2)
138 FIELD(MIO_PIN_19, L1_SEL, 3, 2)
139 FIELD(MIO_PIN_19, L0_SEL, 1, 2)
141 FIELD(MIO_PIN_20, L3_SEL, 7, 3)
142 FIELD(MIO_PIN_20, L2_SEL, 5, 2)
143 FIELD(MIO_PIN_20, L1_SEL, 3, 2)
144 FIELD(MIO_PIN_20, L0_SEL, 1, 2)
146 FIELD(MIO_PIN_21, L3_SEL, 7, 3)
147 FIELD(MIO_PIN_21, L2_SEL, 5, 2)
148 FIELD(MIO_PIN_21, L1_SEL, 3, 2)
149 FIELD(MIO_PIN_21, L0_SEL, 1, 2)
151 FIELD(MIO_PIN_22, L3_SEL, 7, 3)
152 FIELD(MIO_PIN_22, L2_SEL, 5, 2)
153 FIELD(MIO_PIN_22, L1_SEL, 3, 2)
154 FIELD(MIO_PIN_22, L0_SEL, 1, 2)
156 FIELD(MIO_PIN_23, L3_SEL, 7, 3)
157 FIELD(MIO_PIN_23, L2_SEL, 5, 2)
158 FIELD(MIO_PIN_23, L1_SEL, 3, 2)
159 FIELD(MIO_PIN_23, L0_SEL, 1, 2)
161 FIELD(MIO_PIN_24, L3_SEL, 7, 3)
162 FIELD(MIO_PIN_24, L2_SEL, 5, 2)
163 FIELD(MIO_PIN_24, L1_SEL, 3, 2)
164 FIELD(MIO_PIN_24, L0_SEL, 1, 2)
166 FIELD(MIO_PIN_25, L3_SEL, 7, 3)
167 FIELD(MIO_PIN_25, L2_SEL, 5, 2)
168 FIELD(MIO_PIN_25, L1_SEL, 3, 2)
169 FIELD(MIO_PIN_25, L0_SEL, 1, 2)
171 FIELD(MIO_PIN_26, L3_SEL, 7, 3)
172 FIELD(MIO_PIN_26, L2_SEL, 5, 2)
173 FIELD(MIO_PIN_26, L1_SEL, 3, 2)
174 FIELD(MIO_PIN_26, L0_SEL, 1, 2)
176 FIELD(MIO_PIN_27, L3_SEL, 7, 3)
177 FIELD(MIO_PIN_27, L2_SEL, 5, 2)
178 FIELD(MIO_PIN_27, L1_SEL, 3, 2)
179 FIELD(MIO_PIN_27, L0_SEL, 1, 2)
181 FIELD(MIO_PIN_28, L3_SEL, 7, 3)
182 FIELD(MIO_PIN_28, L2_SEL, 5, 2)
183 FIELD(MIO_PIN_28, L1_SEL, 3, 2)
184 FIELD(MIO_PIN_28, L0_SEL, 1, 2)
186 FIELD(MIO_PIN_29, L3_SEL, 7, 3)
187 FIELD(MIO_PIN_29, L2_SEL, 5, 2)
188 FIELD(MIO_PIN_29, L1_SEL, 3, 2)
189 FIELD(MIO_PIN_29, L0_SEL, 1, 2)
191 FIELD(MIO_PIN_30, L3_SEL, 7, 3)
192 FIELD(MIO_PIN_30, L2_SEL, 5, 2)
193 FIELD(MIO_PIN_30, L1_SEL, 3, 2)
194 FIELD(MIO_PIN_30, L0_SEL, 1, 2)
196 FIELD(MIO_PIN_31, L3_SEL, 7, 3)
197 FIELD(MIO_PIN_31, L2_SEL, 5, 2)
198 FIELD(MIO_PIN_31, L1_SEL, 3, 2)
199 FIELD(MIO_PIN_31, L0_SEL, 1, 2)
201 FIELD(MIO_PIN_32, L3_SEL, 7, 3)
202 FIELD(MIO_PIN_32, L2_SEL, 5, 2)
203 FIELD(MIO_PIN_32, L1_SEL, 3, 2)
204 FIELD(MIO_PIN_32, L0_SEL, 1, 2)
206 FIELD(MIO_PIN_33, L3_SEL, 7, 3)
207 FIELD(MIO_PIN_33, L2_SEL, 5, 2)
208 FIELD(MIO_PIN_33, L1_SEL, 3, 2)
209 FIELD(MIO_PIN_33, L0_SEL, 1, 2)
211 FIELD(MIO_PIN_34, L3_SEL, 7, 3)
212 FIELD(MIO_PIN_34, L2_SEL, 5, 2)
213 FIELD(MIO_PIN_34, L1_SEL, 3, 2)
214 FIELD(MIO_PIN_34, L0_SEL, 1, 2)
216 FIELD(MIO_PIN_35, L3_SEL, 7, 3)
217 FIELD(MIO_PIN_35, L2_SEL, 5, 2)
218 FIELD(MIO_PIN_35, L1_SEL, 3, 2)
219 FIELD(MIO_PIN_35, L0_SEL, 1, 2)
221 FIELD(MIO_PIN_36, L3_SEL, 7, 3)
222 FIELD(MIO_PIN_36, L2_SEL, 5, 2)
223 FIELD(MIO_PIN_36, L1_SEL, 3, 2)
224 FIELD(MIO_PIN_36, L0_SEL, 1, 2)
226 FIELD(MIO_PIN_37, L3_SEL, 7, 3)
227 FIELD(MIO_PIN_37, L2_SEL, 5, 2)
228 FIELD(MIO_PIN_37, L1_SEL, 3, 2)
229 FIELD(MIO_PIN_37, L0_SEL, 1, 2)
231 FIELD(MIO_PIN_38, L3_SEL, 7, 3)
232 FIELD(MIO_PIN_38, L2_SEL, 5, 2)
233 FIELD(MIO_PIN_38, L1_SEL, 3, 2)
234 FIELD(MIO_PIN_38, L0_SEL, 1, 2)
236 FIELD(MIO_PIN_39, L3_SEL, 7, 3)
237 FIELD(MIO_PIN_39, L2_SEL, 5, 2)
238 FIELD(MIO_PIN_39, L1_SEL, 3, 2)
239 FIELD(MIO_PIN_39, L0_SEL, 1, 2)
241 FIELD(MIO_PIN_40, L3_SEL, 7, 3)
242 FIELD(MIO_PIN_40, L2_SEL, 5, 2)
243 FIELD(MIO_PIN_40, L1_SEL, 3, 2)
244 FIELD(MIO_PIN_40, L0_SEL, 1, 2)
246 FIELD(MIO_PIN_41, L3_SEL, 7, 3)
247 FIELD(MIO_PIN_41, L2_SEL, 5, 2)
248 FIELD(MIO_PIN_41, L1_SEL, 3, 2)
249 FIELD(MIO_PIN_41, L0_SEL, 1, 2)
251 FIELD(MIO_PIN_42, L3_SEL, 7, 3)
252 FIELD(MIO_PIN_42, L2_SEL, 5, 2)
253 FIELD(MIO_PIN_42, L1_SEL, 3, 2)
254 FIELD(MIO_PIN_42, L0_SEL, 1, 2)
256 FIELD(MIO_PIN_43, L3_SEL, 7, 3)
257 FIELD(MIO_PIN_43, L2_SEL, 5, 2)
258 FIELD(MIO_PIN_43, L1_SEL, 3, 2)
259 FIELD(MIO_PIN_43, L0_SEL, 1, 2)
261 FIELD(MIO_PIN_44, L3_SEL, 7, 3)
262 FIELD(MIO_PIN_44, L2_SEL, 5, 2)
263 FIELD(MIO_PIN_44, L1_SEL, 3, 2)
264 FIELD(MIO_PIN_44, L0_SEL, 1, 2)
266 FIELD(MIO_PIN_45, L3_SEL, 7, 3)
267 FIELD(MIO_PIN_45, L2_SEL, 5, 2)
268 FIELD(MIO_PIN_45, L1_SEL, 3, 2)
269 FIELD(MIO_PIN_45, L0_SEL, 1, 2)
271 FIELD(MIO_PIN_46, L3_SEL, 7, 3)
272 FIELD(MIO_PIN_46, L2_SEL, 5, 2)
273 FIELD(MIO_PIN_46, L1_SEL, 3, 2)
274 FIELD(MIO_PIN_46, L0_SEL, 1, 2)
276 FIELD(MIO_PIN_47, L3_SEL, 7, 3)
277 FIELD(MIO_PIN_47, L2_SEL, 5, 2)
278 FIELD(MIO_PIN_47, L1_SEL, 3, 2)
279 FIELD(MIO_PIN_47, L0_SEL, 1, 2)
281 FIELD(MIO_PIN_48, L3_SEL, 7, 3)
282 FIELD(MIO_PIN_48, L2_SEL, 5, 2)
283 FIELD(MIO_PIN_48, L1_SEL, 3, 2)
284 FIELD(MIO_PIN_48, L0_SEL, 1, 2)
286 FIELD(MIO_PIN_49, L3_SEL, 7, 3)
287 FIELD(MIO_PIN_49, L2_SEL, 5, 2)
288 FIELD(MIO_PIN_49, L1_SEL, 3, 2)
289 FIELD(MIO_PIN_49, L0_SEL, 1, 2)
291 FIELD(MIO_PIN_50, L3_SEL, 7, 3)
292 FIELD(MIO_PIN_50, L2_SEL, 5, 2)
293 FIELD(MIO_PIN_50, L1_SEL, 3, 2)
294 FIELD(MIO_PIN_50, L0_SEL, 1, 2)
296 FIELD(MIO_PIN_51, L3_SEL, 7, 3)
297 FIELD(MIO_PIN_51, L2_SEL, 5, 2)
298 FIELD(MIO_PIN_51, L1_SEL, 3, 2)
299 FIELD(MIO_PIN_51, L0_SEL, 1, 2)
301 FIELD(BNK0_EN_RX, BNK0_EN_RX, 0, 26)
304 FIELD(BNK0_SEL_RX1, BNK0_SEL_RX, 0, 20)
306 FIELD(BNK0_EN_RX_SCHMITT_HYST, BNK0_EN_RX_SCHMITT_HYST, 0, 26)
308 FIELD(BNK0_EN_WK_PD, BNK0_EN_WK_PD, 0, 26)
310 FIELD(BNK0_EN_WK_PU, BNK0_EN_WK_PU, 0, 26)
313 FIELD(BNK0_SEL_DRV1, BNK0_SEL_DRV, 0, 20)
315 FIELD(BNK0_SEL_SLEW, BNK0_SEL_SLEW, 0, 26)
317 FIELD(BNK0_EN_DFT_OPT_INV, BNK0_EN_DFT_OPT_INV, 0, 26)
319 FIELD(BNK0_EN_PAD2PAD_LOOPBACK, BNK0_EN_PAD2PAD_LOOPBACK, 0, 13)
322 FIELD(BNK0_RX_SPARE1, BNK0_RX_SPARE, 0, 20)
325 FIELD(BNK0_TX_SPARE1, BNK0_TX_SPARE, 0, 20)
327 FIELD(BNK0_SEL_EN1P8, BNK0_SEL_EN1P8, 0, 1)
329 FIELD(BNK0_EN_B_POR_DETECT, BNK0_EN_B_POR_DETECT, 0, 1)
331 FIELD(BNK0_LPF_BYP_POR_DETECT, BNK0_LPF_BYP_POR_DETECT, 0, 1)
333 FIELD(BNK0_EN_LATCH, BNK0_EN_LATCH, 0, 1)
335 FIELD(BNK0_VBG_LPF_BYP_B, BNK0_VBG_LPF_BYP_B, 0, 1)
337 FIELD(BNK0_EN_AMP_B, BNK0_EN_AMP_B, 0, 2)
339 FIELD(BNK0_SPARE_BIAS, BNK0_SPARE_BIAS, 0, 4)
341 FIELD(BNK0_DRIVER_BIAS, BNK0_DRIVER_BIAS, 0, 15)
343 FIELD(BNK0_VMODE, BNK0_VMODE, 0, 1)
345 FIELD(BNK0_SEL_AUX_IO_RX, BNK0_SEL_AUX_IO_RX, 0, 26)
347 FIELD(BNK0_EN_TX_HS_MODE, BNK0_EN_TX_HS_MODE, 0, 26)
349 FIELD(MIO_MST_TRI0, PIN_25_TRI, 25, 1)
350 FIELD(MIO_MST_TRI0, PIN_24_TRI, 24, 1)
351 FIELD(MIO_MST_TRI0, PIN_23_TRI, 23, 1)
352 FIELD(MIO_MST_TRI0, PIN_22_TRI, 22, 1)
353 FIELD(MIO_MST_TRI0, PIN_21_TRI, 21, 1)
354 FIELD(MIO_MST_TRI0, PIN_20_TRI, 20, 1)
355 FIELD(MIO_MST_TRI0, PIN_19_TRI, 19, 1)
356 FIELD(MIO_MST_TRI0, PIN_18_TRI, 18, 1)
357 FIELD(MIO_MST_TRI0, PIN_17_TRI, 17, 1)
358 FIELD(MIO_MST_TRI0, PIN_16_TRI, 16, 1)
359 FIELD(MIO_MST_TRI0, PIN_15_TRI, 15, 1)
360 FIELD(MIO_MST_TRI0, PIN_14_TRI, 14, 1)
361 FIELD(MIO_MST_TRI0, PIN_13_TRI, 13, 1)
362 FIELD(MIO_MST_TRI0, PIN_12_TRI, 12, 1)
363 FIELD(MIO_MST_TRI0, PIN_11_TRI, 11, 1)
364 FIELD(MIO_MST_TRI0, PIN_10_TRI, 10, 1)
365 FIELD(MIO_MST_TRI0, PIN_09_TRI, 9, 1)
366 FIELD(MIO_MST_TRI0, PIN_08_TRI, 8, 1)
367 FIELD(MIO_MST_TRI0, PIN_07_TRI, 7, 1)
368 FIELD(MIO_MST_TRI0, PIN_06_TRI, 6, 1)
369 FIELD(MIO_MST_TRI0, PIN_05_TRI, 5, 1)
370 FIELD(MIO_MST_TRI0, PIN_04_TRI, 4, 1)
371 FIELD(MIO_MST_TRI0, PIN_03_TRI, 3, 1)
372 FIELD(MIO_MST_TRI0, PIN_02_TRI, 2, 1)
373 FIELD(MIO_MST_TRI0, PIN_01_TRI, 1, 1)
374 FIELD(MIO_MST_TRI0, PIN_00_TRI, 0, 1)
376 FIELD(MIO_MST_TRI1, PIN_51_TRI, 25, 1)
377 FIELD(MIO_MST_TRI1, PIN_50_TRI, 24, 1)
378 FIELD(MIO_MST_TRI1, PIN_49_TRI, 23, 1)
379 FIELD(MIO_MST_TRI1, PIN_48_TRI, 22, 1)
380 FIELD(MIO_MST_TRI1, PIN_47_TRI, 21, 1)
381 FIELD(MIO_MST_TRI1, PIN_46_TRI, 20, 1)
382 FIELD(MIO_MST_TRI1, PIN_45_TRI, 19, 1)
383 FIELD(MIO_MST_TRI1, PIN_44_TRI, 18, 1)
384 FIELD(MIO_MST_TRI1, PIN_43_TRI, 17, 1)
385 FIELD(MIO_MST_TRI1, PIN_42_TRI, 16, 1)
386 FIELD(MIO_MST_TRI1, PIN_41_TRI, 15, 1)
387 FIELD(MIO_MST_TRI1, PIN_40_TRI, 14, 1)
388 FIELD(MIO_MST_TRI1, PIN_39_TRI, 13, 1)
389 FIELD(MIO_MST_TRI1, PIN_38_TRI, 12, 1)
390 FIELD(MIO_MST_TRI1, PIN_37_TRI, 11, 1)
391 FIELD(MIO_MST_TRI1, PIN_36_TRI, 10, 1)
392 FIELD(MIO_MST_TRI1, PIN_35_TRI, 9, 1)
393 FIELD(MIO_MST_TRI1, PIN_34_TRI, 8, 1)
394 FIELD(MIO_MST_TRI1, PIN_33_TRI, 7, 1)
395 FIELD(MIO_MST_TRI1, PIN_32_TRI, 6, 1)
396 FIELD(MIO_MST_TRI1, PIN_31_TRI, 5, 1)
397 FIELD(MIO_MST_TRI1, PIN_30_TRI, 4, 1)
398 FIELD(MIO_MST_TRI1, PIN_29_TRI, 3, 1)
399 FIELD(MIO_MST_TRI1, PIN_28_TRI, 2, 1)
400 FIELD(MIO_MST_TRI1, PIN_27_TRI, 1, 1)
401 FIELD(MIO_MST_TRI1, PIN_26_TRI, 0, 1)
403 FIELD(BNK1_EN_RX, BNK1_EN_RX, 0, 26)
406 FIELD(BNK1_SEL_RX1, BNK1_SEL_RX, 0, 20)
408 FIELD(BNK1_EN_RX_SCHMITT_HYST, BNK1_EN_RX_SCHMITT_HYST, 0, 26)
410 FIELD(BNK1_EN_WK_PD, BNK1_EN_WK_PD, 0, 26)
412 FIELD(BNK1_EN_WK_PU, BNK1_EN_WK_PU, 0, 26)
415 FIELD(BNK1_SEL_DRV1, BNK1_SEL_DRV, 0, 20)
417 FIELD(BNK1_SEL_SLEW, BNK1_SEL_SLEW, 0, 26)
419 FIELD(BNK1_EN_DFT_OPT_INV, BNK1_EN_DFT_OPT_INV, 0, 26)
421 FIELD(BNK1_EN_PAD2PAD_LOOPBACK, BNK1_EN_PAD2PAD_LOOPBACK, 0, 13)
424 FIELD(BNK1_RX_SPARE1, BNK1_RX_SPARE, 0, 20)
427 FIELD(BNK1_TX_SPARE1, BNK1_TX_SPARE, 0, 20)
429 FIELD(BNK1_SEL_EN1P8, BNK1_SEL_EN1P8, 0, 1)
431 FIELD(BNK1_EN_B_POR_DETECT, BNK1_EN_B_POR_DETECT, 0, 1)
433 FIELD(BNK1_LPF_BYP_POR_DETECT, BNK1_LPF_BYP_POR_DETECT, 0, 1)
435 FIELD(BNK1_EN_LATCH, BNK1_EN_LATCH, 0, 1)
437 FIELD(BNK1_VBG_LPF_BYP_B, BNK1_VBG_LPF_BYP_B, 0, 1)
439 FIELD(BNK1_EN_AMP_B, BNK1_EN_AMP_B, 0, 2)
441 FIELD(BNK1_SPARE_BIAS, BNK1_SPARE_BIAS, 0, 4)
443 FIELD(BNK1_DRIVER_BIAS, BNK1_DRIVER_BIAS, 0, 15)
445 FIELD(BNK1_VMODE, BNK1_VMODE, 0, 1)
447 FIELD(BNK1_SEL_AUX_IO_RX, BNK1_SEL_AUX_IO_RX, 0, 26)
449 FIELD(BNK1_EN_TX_HS_MODE, BNK1_EN_TX_HS_MODE, 0, 26)
451 FIELD(SD0_CLK_CTRL, SDIO0_FBCLK_SEL, 2, 1)
452 FIELD(SD0_CLK_CTRL, SDIO0_RX_SRC_SEL, 0, 2)
454 FIELD(SD0_CTRL_REG, SD0_EMMC_SEL, 0, 1)
456 FIELD(SD0_CONFIG_REG1, SD0_BASECLK, 7, 8)
457 FIELD(SD0_CONFIG_REG1, SD0_TUNIGCOUNT, 1, 6)
458 FIELD(SD0_CONFIG_REG1, SD0_ASYNCWKPENA, 0, 1)
460 FIELD(SD0_CONFIG_REG2, SD0_SLOTTYPE, 12, 2)
461 FIELD(SD0_CONFIG_REG2, SD0_ASYCINTR, 11, 1)
462 FIELD(SD0_CONFIG_REG2, SD0_64BIT, 10, 1)
463 FIELD(SD0_CONFIG_REG2, SD0_1P8V, 9, 1)
464 FIELD(SD0_CONFIG_REG2, SD0_3P0V, 8, 1)
465 FIELD(SD0_CONFIG_REG2, SD0_3P3V, 7, 1)
466 FIELD(SD0_CONFIG_REG2, SD0_SUSPRES, 6, 1)
467 FIELD(SD0_CONFIG_REG2, SD0_SDMA, 5, 1)
468 FIELD(SD0_CONFIG_REG2, SD0_HIGHSPEED, 4, 1)
469 FIELD(SD0_CONFIG_REG2, SD0_ADMA2, 3, 1)
470 FIELD(SD0_CONFIG_REG2, SD0_8BIT, 2, 1)
471 FIELD(SD0_CONFIG_REG2, SD0_MAXBLK, 0, 2)
473 FIELD(SD0_CONFIG_REG3, SD0_TUNINGSDR50, 10, 1)
474 FIELD(SD0_CONFIG_REG3, SD0_RETUNETMR, 6, 4)
475 FIELD(SD0_CONFIG_REG3, SD0_DDRIVER, 5, 1)
476 FIELD(SD0_CONFIG_REG3, SD0_CDRIVER, 4, 1)
477 FIELD(SD0_CONFIG_REG3, SD0_ADRIVER, 3, 1)
478 FIELD(SD0_CONFIG_REG3, SD0_DDR50, 2, 1)
479 FIELD(SD0_CONFIG_REG3, SD0_SDR104, 1, 1)
480 FIELD(SD0_CONFIG_REG3, SD0_SDR50, 0, 1)
482 FIELD(SD0_INITPRESET, SD0_INITPRESET, 0, 13)
484 FIELD(SD0_DSPPRESET, SD0_DSPPRESET, 0, 13)
486 FIELD(SD0_HSPDPRESET, SD0_HSPDPRESET, 0, 13)
488 FIELD(SD0_SDR12PRESET, SD0_SDR12PRESET, 0, 13)
490 FIELD(SD0_SDR25PRESET, SD0_SDR25PRESET, 0, 13)
492 FIELD(SD0_SDR50PRSET, SD0_SDR50PRESET, 0, 13)
494 FIELD(SD0_SDR104PRST, SD0_SDR104PRESET, 0, 13)
496 FIELD(SD0_DDR50PRESET, SD0_DDR50PRESET, 0, 13)
498 FIELD(SD0_MAXCUR1P8, SD0_MAXCUR1P8, 0, 8)
500 FIELD(SD0_MAXCUR3P0, SD0_MAXCUR3P0, 0, 8)
502 FIELD(SD0_MAXCUR3P3, SD0_MAXCUR3P3, 0, 8)
504 FIELD(SD0_DLL_CTRL, SD0_CLKSTABLE_CFG, 9, 1)
505 FIELD(SD0_DLL_CTRL, SD0_DLL_CFG, 5, 4)
506 FIELD(SD0_DLL_CTRL, SD0_DLL_PSDONE, 4, 1)
507 FIELD(SD0_DLL_CTRL, SD0_DLL_OVF, 3, 1)
508 FIELD(SD0_DLL_CTRL, SD0_DLL_RST, 2, 1)
509 FIELD(SD0_DLL_CTRL, SD0_DLL_TESTMODE, 1, 1)
510 FIELD(SD0_DLL_CTRL, SD0_DLL_LOCK, 0, 1)
512 FIELD(SD0_CDN_CTRL, SD0_CDN_CTRL, 0, 1)
514 FIELD(SD0_DLL_TEST, DLL_DIV, 16, 8)
515 FIELD(SD0_DLL_TEST, DLL_TX_SEL, 9, 7)
516 FIELD(SD0_DLL_TEST, DLL_RX_SEL, 0, 9)
518 FIELD(SD0_RX_TUNING_SEL, SD0_RX_SEL, 0, 9)
520 FIELD(SD0_DLL_DIV_MAP0, DIV_3, 24, 8)
521 FIELD(SD0_DLL_DIV_MAP0, DIV_2, 16, 8)
522 FIELD(SD0_DLL_DIV_MAP0, DIV_1, 8, 8)
523 FIELD(SD0_DLL_DIV_MAP0, DIV_0, 0, 8)
525 FIELD(SD0_DLL_DIV_MAP1, DIV_7, 24, 8)
526 FIELD(SD0_DLL_DIV_MAP1, DIV_6, 16, 8)
527 FIELD(SD0_DLL_DIV_MAP1, DIV_5, 8, 8)
528 FIELD(SD0_DLL_DIV_MAP1, DIV_4, 0, 8)
530 FIELD(SD0_IOU_COHERENT_CTRL, SD0_AXI_COH, 0, 4)
532 FIELD(SD0_IOU_INTERCONNECT_ROUTE, SD0, 0, 1)
534 FIELD(SD0_IOU_RAM, EMASA0, 6, 1)
535 FIELD(SD0_IOU_RAM, EMAB0, 3, 3)
536 FIELD(SD0_IOU_RAM, EMAA0, 0, 3)
538 FIELD(SD0_IOU_INTERCONNECT_QOS, SD0_QOS, 0, 4)
540 FIELD(SD1_CLK_CTRL, SDIO1_FBCLK_SEL, 1, 1)
541 FIELD(SD1_CLK_CTRL, SDIO1_RX_SRC_SEL, 0, 1)
543 FIELD(SD1_CTRL_REG, SD1_EMMC_SEL, 0, 1)
545 FIELD(SD1_CONFIG_REG1, SD1_BASECLK, 7, 8)
546 FIELD(SD1_CONFIG_REG1, SD1_TUNIGCOUNT, 1, 6)
547 FIELD(SD1_CONFIG_REG1, SD1_ASYNCWKPENA, 0, 1)
549 FIELD(SD1_CONFIG_REG2, SD1_SLOTTYPE, 12, 2)
550 FIELD(SD1_CONFIG_REG2, SD1_ASYCINTR, 11, 1)
551 FIELD(SD1_CONFIG_REG2, SD1_64BIT, 10, 1)
552 FIELD(SD1_CONFIG_REG2, SD1_1P8V, 9, 1)
553 FIELD(SD1_CONFIG_REG2, SD1_3P0V, 8, 1)
554 FIELD(SD1_CONFIG_REG2, SD1_3P3V, 7, 1)
555 FIELD(SD1_CONFIG_REG2, SD1_SUSPRES, 6, 1)
556 FIELD(SD1_CONFIG_REG2, SD1_SDMA, 5, 1)
557 FIELD(SD1_CONFIG_REG2, SD1_HIGHSPEED, 4, 1)
558 FIELD(SD1_CONFIG_REG2, SD1_ADMA2, 3, 1)
559 FIELD(SD1_CONFIG_REG2, SD1_8BIT, 2, 1)
560 FIELD(SD1_CONFIG_REG2, SD1_MAXBLK, 0, 2)
562 FIELD(SD1_CONFIG_REG3, SD1_TUNINGSDR50, 10, 1)
563 FIELD(SD1_CONFIG_REG3, SD1_RETUNETMR, 6, 4)
564 FIELD(SD1_CONFIG_REG3, SD1_DDRIVER, 5, 1)
565 FIELD(SD1_CONFIG_REG3, SD1_CDRIVER, 4, 1)
566 FIELD(SD1_CONFIG_REG3, SD1_ADRIVER, 3, 1)
567 FIELD(SD1_CONFIG_REG3, SD1_DDR50, 2, 1)
568 FIELD(SD1_CONFIG_REG3, SD1_SDR104, 1, 1)
569 FIELD(SD1_CONFIG_REG3, SD1_SDR50, 0, 1)
571 FIELD(SD1_INITPRESET, SD1_INITPRESET, 0, 13)
573 FIELD(SD1_DSPPRESET, SD1_DSPPRESET, 0, 13)
575 FIELD(SD1_HSPDPRESET, SD1_HSPDPRESET, 0, 13)
577 FIELD(SD1_SDR12PRESET, SD1_SDR12PRESET, 0, 13)
579 FIELD(SD1_SDR25PRESET, SD1_SDR25PRESET, 0, 13)
581 FIELD(SD1_SDR50PRSET, SD1_SDR50PRESET, 0, 13)
583 FIELD(SD1_SDR104PRST, SD1_SDR104PRESET, 0, 13)
585 FIELD(SD1_DDR50PRESET, SD1_DDR50PRESET, 0, 13)
587 FIELD(SD1_MAXCUR1P8, SD1_MAXCUR1P8, 0, 8)
589 FIELD(SD1_MAXCUR3P0, SD1_MAXCUR3P0, 0, 8)
591 FIELD(SD1_MAXCUR3P3, SD1_MAXCUR3P3, 0, 8)
593 FIELD(SD1_DLL_CTRL, SD1_CLKSTABLE_CFG, 9, 1)
594 FIELD(SD1_DLL_CTRL, SD1_DLL_CFG, 5, 4)
595 FIELD(SD1_DLL_CTRL, SD1_DLL_PSDONE, 4, 1)
596 FIELD(SD1_DLL_CTRL, SD1_DLL_OVF, 3, 1)
597 FIELD(SD1_DLL_CTRL, SD1_DLL_RST, 2, 1)
598 FIELD(SD1_DLL_CTRL, SD1_DLL_TESTMODE, 1, 1)
599 FIELD(SD1_DLL_CTRL, SD1_DLL_LOCK, 0, 1)
601 FIELD(SD1_CDN_CTRL, SD1_CDN_CTRL, 0, 1)
603 FIELD(SD1_DLL_TEST, DLL_DIV, 16, 8)
604 FIELD(SD1_DLL_TEST, DLL_TX_SEL, 9, 7)
605 FIELD(SD1_DLL_TEST, DLL_RX_SEL, 0, 9)
607 FIELD(SD1_RX_TUNING_SEL, SD1_RX_SEL, 0, 9)
609 FIELD(SD1_DLL_DIV_MAP0, DIV_3, 24, 8)
610 FIELD(SD1_DLL_DIV_MAP0, DIV_2, 16, 8)
611 FIELD(SD1_DLL_DIV_MAP0, DIV_1, 8, 8)
612 FIELD(SD1_DLL_DIV_MAP0, DIV_0, 0, 8)
614 FIELD(SD1_DLL_DIV_MAP1, DIV_7, 24, 8)
615 FIELD(SD1_DLL_DIV_MAP1, DIV_6, 16, 8)
616 FIELD(SD1_DLL_DIV_MAP1, DIV_5, 8, 8)
617 FIELD(SD1_DLL_DIV_MAP1, DIV_4, 0, 8)
619 FIELD(SD1_IOU_COHERENT_CTRL, SD1_AXI_COH, 0, 4)
621 FIELD(SD1_IOU_INTERCONNECT_ROUTE, SD1, 0, 1)
623 FIELD(SD1_IOU_RAM, EMASA0, 6, 1)
624 FIELD(SD1_IOU_RAM, EMAB0, 3, 3)
625 FIELD(SD1_IOU_RAM, EMAA0, 0, 3)
627 FIELD(SD1_IOU_INTERCONNECT_QOS, SD1_QOS, 0, 4)
629 FIELD(OSPI_QSPI_IOU_AXI_MUX_SEL, OSPI_MUX_SEL, 1, 1)
630 FIELD(OSPI_QSPI_IOU_AXI_MUX_SEL, QSPI_OSPI_MUX_SEL, 0, 1)
632 FIELD(QSPI_IOU_COHERENT_CTRL, QSPI_AXI_COH, 0, 4)
634 FIELD(QSPI_IOU_INTERCONNECT_ROUTE, QSPI, 0, 1)
636 FIELD(QSPI_IOU_RAM, EMASA1, 13, 1)
637 FIELD(QSPI_IOU_RAM, EMAB1, 10, 3)
638 FIELD(QSPI_IOU_RAM, EMAA1, 7, 3)
639 FIELD(QSPI_IOU_RAM, EMASA0, 6, 1)
640 FIELD(QSPI_IOU_RAM, EMAB0, 3, 3)
641 FIELD(QSPI_IOU_RAM, EMAA0, 0, 3)
643 FIELD(QSPI_IOU_INTERCONNECT_QOS, QSPI_QOS, 0, 4)
645 FIELD(OSPI_IOU_COHERENT_CTRL, OSPI_AXI_COH, 0, 4)
647 FIELD(OSPI_IOU_INTERCONNECT_ROUTE, OSPI, 0, 1)
649 FIELD(OSPI_IOU_RAM, EMAS0, 5, 1)
650 FIELD(OSPI_IOU_RAM, EMAW0, 3, 2)
651 FIELD(OSPI_IOU_RAM, EMA0, 0, 3)
653 FIELD(OSPI_IOU_INTERCONNECT_QOS, OSPI_QOS, 0, 4)
655 FIELD(OSPI_REFCLK_DLY_CTRL, DLY1, 3, 2)
656 FIELD(OSPI_REFCLK_DLY_CTRL, DLY0, 0, 3)
658 FIELD(CUR_PWR_ST, U2PMU, 0, 2)
660 FIELD(CONNECT_ST, U2PMU, 0, 1)
662 FIELD(PW_STATE_REQ, BIT_1_0, 0, 2)
664 FIELD(HOST_U2_PORT_DISABLE, BIT_0, 0, 1)
668 FIELD(DBG_U2PMU_EXT2, BIT_67_64, 0, 4)
670 FIELD(PME_GEN_U2PMU, BIT_0, 0, 1)
672 FIELD(PWR_CONFIG_USB2, STRAP, 0, 30)
674 FIELD(PHY_HUB, VBUS_CTRL, 1, 1)
675 FIELD(PHY_HUB, OVER_CURRENT, 0, 1)
677 FIELD(CTRL, SLVERR_ENABLE, 0, 1)
679 FIELD(ISR, ADDR_DECODE_ERR, 0, 1)
681 FIELD(IMR, ADDR_DECODE_ERR, 0, 1)
683 FIELD(IER, ADDR_DECODE_ERR, 0, 1)
685 FIELD(IDR, ADDR_DECODE_ERR, 0, 1)
687 FIELD(ITR, ADDR_DECODE_ERR, 0, 1)
689 FIELD(PARITY_ISR, PERR_AXI_SD1_IOU, 12, 1)
690 FIELD(PARITY_ISR, PERR_AXI_SD0_IOU, 11, 1)
691 FIELD(PARITY_ISR, PERR_AXI_QSPI_IOU, 10, 1)
692 FIELD(PARITY_ISR, PERR_AXI_OSPI_IOU, 9, 1)
693 FIELD(PARITY_ISR, PERR_IOU_SD1, 8, 1)
694 FIELD(PARITY_ISR, PERR_IOU_SD0, 7, 1)
695 FIELD(PARITY_ISR, PERR_IOU_QSPI1, 6, 1)
696 FIELD(PARITY_ISR, PERR_IOUSLCR_SECURE_APB, 5, 1)
697 FIELD(PARITY_ISR, PERR_IOUSLCR_APB, 4, 1)
698 FIELD(PARITY_ISR, PERR_QSPI0_APB, 3, 1)
699 FIELD(PARITY_ISR, PERR_OSPI_APB, 2, 1)
700 FIELD(PARITY_ISR, PERR_I2C_APB, 1, 1)
701 FIELD(PARITY_ISR, PERR_GPIO_APB, 0, 1)
703 FIELD(PARITY_IMR, PERR_AXI_SD1_IOU, 12, 1)
704 FIELD(PARITY_IMR, PERR_AXI_SD0_IOU, 11, 1)
705 FIELD(PARITY_IMR, PERR_AXI_QSPI_IOU, 10, 1)
706 FIELD(PARITY_IMR, PERR_AXI_OSPI_IOU, 9, 1)
707 FIELD(PARITY_IMR, PERR_IOU_SD1, 8, 1)
708 FIELD(PARITY_IMR, PERR_IOU_SD0, 7, 1)
709 FIELD(PARITY_IMR, PERR_IOU_QSPI1, 6, 1)
710 FIELD(PARITY_IMR, PERR_IOUSLCR_SECURE_APB, 5, 1)
711 FIELD(PARITY_IMR, PERR_IOUSLCR_APB, 4, 1)
712 FIELD(PARITY_IMR, PERR_QSPI0_APB, 3, 1)
713 FIELD(PARITY_IMR, PERR_OSPI_APB, 2, 1)
714 FIELD(PARITY_IMR, PERR_I2C_APB, 1, 1)
715 FIELD(PARITY_IMR, PERR_GPIO_APB, 0, 1)
717 FIELD(PARITY_IER, PERR_AXI_SD1_IOU, 12, 1)
718 FIELD(PARITY_IER, PERR_AXI_SD0_IOU, 11, 1)
719 FIELD(PARITY_IER, PERR_AXI_QSPI_IOU, 10, 1)
720 FIELD(PARITY_IER, PERR_AXI_OSPI_IOU, 9, 1)
721 FIELD(PARITY_IER, PERR_IOU_SD1, 8, 1)
722 FIELD(PARITY_IER, PERR_IOU_SD0, 7, 1)
723 FIELD(PARITY_IER, PERR_IOU_QSPI1, 6, 1)
724 FIELD(PARITY_IER, PERR_IOUSLCR_SECURE_APB, 5, 1)
725 FIELD(PARITY_IER, PERR_IOUSLCR_APB, 4, 1)
726 FIELD(PARITY_IER, PERR_QSPI0_APB, 3, 1)
727 FIELD(PARITY_IER, PERR_OSPI_APB, 2, 1)
728 FIELD(PARITY_IER, PERR_I2C_APB, 1, 1)
729 FIELD(PARITY_IER, PERR_GPIO_APB, 0, 1)
731 FIELD(PARITY_IDR, PERR_AXI_SD1_IOU, 12, 1)
732 FIELD(PARITY_IDR, PERR_AXI_SD0_IOU, 11, 1)
733 FIELD(PARITY_IDR, PERR_AXI_QSPI_IOU, 10, 1)
734 FIELD(PARITY_IDR, PERR_AXI_OSPI_IOU, 9, 1)
735 FIELD(PARITY_IDR, PERR_IOU_SD1, 8, 1)
736 FIELD(PARITY_IDR, PERR_IOU_SD0, 7, 1)
737 FIELD(PARITY_IDR, PERR_IOU_QSPI1, 6, 1)
738 FIELD(PARITY_IDR, PERR_IOUSLCR_SECURE_APB, 5, 1)
739 FIELD(PARITY_IDR, PERR_IOUSLCR_APB, 4, 1)
740 FIELD(PARITY_IDR, PERR_QSPI0_APB, 3, 1)
741 FIELD(PARITY_IDR, PERR_OSPI_APB, 2, 1)
742 FIELD(PARITY_IDR, PERR_I2C_APB, 1, 1)
743 FIELD(PARITY_IDR, PERR_GPIO_APB, 0, 1)
745 FIELD(PARITY_ITR, PERR_AXI_SD1_IOU, 12, 1)
746 FIELD(PARITY_ITR, PERR_AXI_SD0_IOU, 11, 1)
747 FIELD(PARITY_ITR, PERR_AXI_QSPI_IOU, 10, 1)
748 FIELD(PARITY_ITR, PERR_AXI_OSPI_IOU, 9, 1)
749 FIELD(PARITY_ITR, PERR_IOU_SD1, 8, 1)
750 FIELD(PARITY_ITR, PERR_IOU_SD0, 7, 1)
751 FIELD(PARITY_ITR, PERR_IOU_QSPI1, 6, 1)
752 FIELD(PARITY_ITR, PERR_IOUSLCR_SECURE_APB, 5, 1)
753 FIELD(PARITY_ITR, PERR_IOUSLCR_APB, 4, 1)
754 FIELD(PARITY_ITR, PERR_QSPI0_APB, 3, 1)
755 FIELD(PARITY_ITR, PERR_OSPI_APB, 2, 1)
756 FIELD(PARITY_ITR, PERR_I2C_APB, 1, 1)
757 FIELD(PARITY_ITR, PERR_GPIO_APB, 0, 1)
759 FIELD(WPROT0, ACTIVE, 0, 1)