Lines Matching +full:port +full:- +full:level
21 #include "hw/misc/tz-ppc.h"
22 #include "hw/qdev-properties.h"
26 bool level = s->irq_status && s->irq_enable; in tz_ppc_update_irq() local
28 trace_tz_ppc_update_irq(level); in tz_ppc_update_irq()
29 qemu_set_irq(s->irq, level); in tz_ppc_update_irq()
32 static void tz_ppc_cfg_nonsec(void *opaque, int n, int level) in tz_ppc_cfg_nonsec() argument
37 trace_tz_ppc_cfg_nonsec(n, level); in tz_ppc_cfg_nonsec()
38 s->cfg_nonsec[n] = level; in tz_ppc_cfg_nonsec()
41 static void tz_ppc_cfg_ap(void *opaque, int n, int level) in tz_ppc_cfg_ap() argument
46 trace_tz_ppc_cfg_ap(n, level); in tz_ppc_cfg_ap()
47 s->cfg_ap[n] = level; in tz_ppc_cfg_ap()
50 static void tz_ppc_cfg_sec_resp(void *opaque, int n, int level) in tz_ppc_cfg_sec_resp() argument
54 trace_tz_ppc_cfg_sec_resp(level); in tz_ppc_cfg_sec_resp()
55 s->cfg_sec_resp = level; in tz_ppc_cfg_sec_resp()
58 static void tz_ppc_irq_enable(void *opaque, int n, int level) in tz_ppc_irq_enable() argument
62 trace_tz_ppc_irq_enable(level); in tz_ppc_irq_enable()
63 s->irq_enable = level; in tz_ppc_irq_enable()
67 static void tz_ppc_irq_clear(void *opaque, int n, int level) in tz_ppc_irq_clear() argument
71 trace_tz_ppc_irq_clear(level); in tz_ppc_irq_clear()
73 s->irq_clear = level; in tz_ppc_irq_clear()
74 if (level) { in tz_ppc_irq_clear()
75 s->irq_status = false; in tz_ppc_irq_clear()
82 /* Check whether to allow an access to port n; return true if in tz_ppc_check()
89 * or if cfg_nonsec is 0 and transaction is non-secure in tz_ppc_check()
92 if ((attrs.secure == s->cfg_nonsec[n] && !(s->nonsec_mask & (1 << n))) || in tz_ppc_check()
93 (attrs.user && !s->cfg_ap[n])) { in tz_ppc_check()
95 if (!s->irq_clear) { in tz_ppc_check()
97 s->irq_status = true; in tz_ppc_check()
109 TZPPC *s = p->ppc; in tz_ppc_read()
110 int n = p - s->port; in tz_ppc_read()
111 AddressSpace *as = &p->downstream_as; in tz_ppc_read()
117 if (s->cfg_sec_resp) { in tz_ppc_read()
149 TZPPC *s = p->ppc; in tz_ppc_write()
150 AddressSpace *as = &p->downstream_as; in tz_ppc_write()
151 int n = p - s->port; in tz_ppc_write()
156 if (s->cfg_sec_resp) { in tz_ppc_write()
193 * Board code should never map the upstream end of an unused port, in tz_ppc_dummy_accepts()
222 s->cfg_sec_resp = false; in tz_ppc_reset()
223 memset(s->cfg_nonsec, 0, sizeof(s->cfg_nonsec)); in tz_ppc_reset()
224 memset(s->cfg_ap, 0, sizeof(s->cfg_ap)); in tz_ppc_reset()
237 qdev_init_gpio_out_named(dev, &s->irq, "irq", 1); in tz_ppc_init()
248 /* We can't create the upstream end of the port until realize, in tz_ppc_realize()
252 if (s->port[i].downstream) { in tz_ppc_realize()
258 TZPPCPort *port = &s->port[i]; in tz_ppc_realize() local
262 if (!port->downstream) { in tz_ppc_realize()
265 * numbering doesn't get out of sync with the port numbers. in tz_ppc_realize()
268 name = g_strdup_printf("tz-ppc-dummy-port[%d]", i); in tz_ppc_realize()
269 memory_region_init_io(&port->upstream, obj, &tz_ppc_dummy_ops, in tz_ppc_realize()
270 port, name, 0x10000); in tz_ppc_realize()
271 sysbus_init_mmio(sbd, &port->upstream); in tz_ppc_realize()
276 name = g_strdup_printf("tz-ppc-port[%d]", i); in tz_ppc_realize()
278 port->ppc = s; in tz_ppc_realize()
279 address_space_init(&port->downstream_as, port->downstream, name); in tz_ppc_realize()
281 size = memory_region_size(port->downstream); in tz_ppc_realize()
282 memory_region_init_io(&port->upstream, obj, &tz_ppc_ops, in tz_ppc_realize()
283 port, name, size); in tz_ppc_realize()
284 sysbus_init_mmio(sbd, &port->upstream); in tz_ppc_realize()
290 .name = "tz-ppc",
305 DEFINE_PROP_LINK("port[" #N "]", TZPPC, port[N].downstream, \
332 dc->realize = tz_ppc_realize; in tz_ppc_class_init()
333 dc->vmsd = &tz_ppc_vmstate; in tz_ppc_class_init()