69 static unsigned valid_mask(unsigned bank)  in valid_mask()  argument
71     return MAKE_64BIT_MASK(0, irqs_per_bank[bank]);  in valid_mask()
74 static unsigned configurable_mask(unsigned bank)  in configurable_mask()  argument
76     return valid_mask(bank) & ~exti_romask[bank];  in configurable_mask()
83     for (unsigned bank = 0; bank < EXTI_NUM_REGISTER; bank++) {  in stm32l4x5_exti_reset_hold()  local
84         s->imr[bank] = exti_romask[bank];  in stm32l4x5_exti_reset_hold()
85         s->emr[bank] = 0x00000000;  in stm32l4x5_exti_reset_hold()
86         s->rtsr[bank] = 0x00000000;  in stm32l4x5_exti_reset_hold()
87         s->ftsr[bank] = 0x00000000;  in stm32l4x5_exti_reset_hold()
88         s->swier[bank] = 0x00000000;  in stm32l4x5_exti_reset_hold()
89         s->pr[bank] = 0x00000000;  in stm32l4x5_exti_reset_hold()
90         s->irq_levels[bank] = 0x00000000;  in stm32l4x5_exti_reset_hold()
97     const unsigned bank = regbank_index_by_irq(irq);  in stm32l4x5_exti_set_irq()  local
105     if (level == extract32(s->irq_levels[bank], irq, 1)) {  in stm32l4x5_exti_set_irq()
109     s->irq_levels[bank] = deposit32(s->irq_levels[bank], irq, 1, level);  in stm32l4x5_exti_set_irq()
112     if (!extract32(s->imr[bank], irq, 1)) {  in stm32l4x5_exti_set_irq()
117     if (extract32(exti_romask[bank], irq, 1)) {  in stm32l4x5_exti_set_irq()
123     if ((level && extract32(s->rtsr[bank], irq, 1)) ||  in stm32l4x5_exti_set_irq()
124         (!level && extract32(s->ftsr[bank], irq, 1))) {  in stm32l4x5_exti_set_irq()
126         s->pr[bank] |= 1 << irq;  in stm32l4x5_exti_set_irq()
136     const unsigned bank = regbank_index_by_addr(addr);  in stm32l4x5_exti_read()  local
141         r = s->imr[bank];  in stm32l4x5_exti_read()
145         r = s->emr[bank];  in stm32l4x5_exti_read()
149         r = s->rtsr[bank];  in stm32l4x5_exti_read()
153         r = s->ftsr[bank];  in stm32l4x5_exti_read()
157         r = s->swier[bank];  in stm32l4x5_exti_read()
161         r = s->pr[bank];  in stm32l4x5_exti_read()
180     const unsigned bank = regbank_index_by_addr(addr);  in stm32l4x5_exti_write()  local
187         s->imr[bank] = val64 & valid_mask(bank);  in stm32l4x5_exti_write()
191         s->emr[bank] = val64 & valid_mask(bank);  in stm32l4x5_exti_write()
195         s->rtsr[bank] = val64 & configurable_mask(bank);  in stm32l4x5_exti_write()
199         s->ftsr[bank] = val64 & configurable_mask(bank);  in stm32l4x5_exti_write()
203         const uint32_t set = val64 & configurable_mask(bank);  in stm32l4x5_exti_write()
204         const uint32_t pend = set & ~s->swier[bank] & s->imr[bank] &  in stm32l4x5_exti_write()
205                               ~s->pr[bank];  in stm32l4x5_exti_write()
206         s->swier[bank] = set;  in stm32l4x5_exti_write()
207         s->pr[bank] |= pend;  in stm32l4x5_exti_write()
208         for (unsigned i = 0; i < irqs_per_bank[bank]; i++) {  in stm32l4x5_exti_write()
210                 qemu_irq_pulse(s->irq[i + 32 * bank]);  in stm32l4x5_exti_write()
217         const uint32_t cleared = s->pr[bank] & val64 & configurable_mask(bank);  in stm32l4x5_exti_write()
219         s->pr[bank] &= ~cleared;  in stm32l4x5_exti_write()
221         s->swier[bank] &= ~cleared;  in stm32l4x5_exti_write()