Lines Matching full:ch

59 #define DBDMA_DPRINTFCH(ch, fmt, ...) do { \  argument
61 if ((1ul << (ch)->channel) & DEBUG_DBDMA_CHANMASK) { \
62 printf("DBDMA[%02x]: " fmt , (ch)->channel, ## __VA_ARGS__); \
70 static DBDMAState *dbdma_from_ch(DBDMA_channel *ch) in dbdma_from_ch() argument
72 return container_of(ch, DBDMAState, channels[ch->channel]); in dbdma_from_ch()
76 static void dump_dbdma_cmd(DBDMA_channel *ch, dbdma_cmd *cmd) in dump_dbdma_cmd() argument
78 DBDMA_DPRINTFCH(ch, "dbdma_cmd %p\n", cmd); in dump_dbdma_cmd()
79 DBDMA_DPRINTFCH(ch, " req_count 0x%04x\n", le16_to_cpu(cmd->req_count)); in dump_dbdma_cmd()
80 DBDMA_DPRINTFCH(ch, " command 0x%04x\n", le16_to_cpu(cmd->command)); in dump_dbdma_cmd()
81 DBDMA_DPRINTFCH(ch, " phy_addr 0x%08x\n", le32_to_cpu(cmd->phy_addr)); in dump_dbdma_cmd()
82 DBDMA_DPRINTFCH(ch, " cmd_dep 0x%08x\n", le32_to_cpu(cmd->cmd_dep)); in dump_dbdma_cmd()
83 DBDMA_DPRINTFCH(ch, " res_count 0x%04x\n", le16_to_cpu(cmd->res_count)); in dump_dbdma_cmd()
84 DBDMA_DPRINTFCH(ch, " xfer_status 0x%04x\n", in dump_dbdma_cmd()
88 static void dump_dbdma_cmd(DBDMA_channel *ch, dbdma_cmd *cmd) in dump_dbdma_cmd() argument
92 static void dbdma_cmdptr_load(DBDMA_channel *ch) in dbdma_cmdptr_load() argument
94 DBDMA_DPRINTFCH(ch, "dbdma_cmdptr_load 0x%08x\n", in dbdma_cmdptr_load()
95 ch->regs[DBDMA_CMDPTR_LO]); in dbdma_cmdptr_load()
96 dma_memory_read(&address_space_memory, ch->regs[DBDMA_CMDPTR_LO], in dbdma_cmdptr_load()
97 &ch->current, sizeof(dbdma_cmd), MEMTXATTRS_UNSPECIFIED); in dbdma_cmdptr_load()
100 static void dbdma_cmdptr_save(DBDMA_channel *ch) in dbdma_cmdptr_save() argument
102 DBDMA_DPRINTFCH(ch, "-> update 0x%08x stat=0x%08x, res=0x%04x\n", in dbdma_cmdptr_save()
103 ch->regs[DBDMA_CMDPTR_LO], in dbdma_cmdptr_save()
104 le16_to_cpu(ch->current.xfer_status), in dbdma_cmdptr_save()
105 le16_to_cpu(ch->current.res_count)); in dbdma_cmdptr_save()
106 dma_memory_write(&address_space_memory, ch->regs[DBDMA_CMDPTR_LO], in dbdma_cmdptr_save()
107 &ch->current, sizeof(dbdma_cmd), MEMTXATTRS_UNSPECIFIED); in dbdma_cmdptr_save()
110 static void kill_channel(DBDMA_channel *ch) in kill_channel() argument
112 DBDMA_DPRINTFCH(ch, "kill_channel\n"); in kill_channel()
114 ch->regs[DBDMA_STATUS] |= DEAD; in kill_channel()
115 ch->regs[DBDMA_STATUS] &= ~ACTIVE; in kill_channel()
117 qemu_irq_raise(ch->irq); in kill_channel()
120 static void conditional_interrupt(DBDMA_channel *ch) in conditional_interrupt() argument
122 dbdma_cmd *current = &ch->current; in conditional_interrupt()
128 DBDMA_DPRINTFCH(ch, "%s\n", __func__); in conditional_interrupt()
136 qemu_irq_raise(ch->irq); in conditional_interrupt()
137 DBDMA_DPRINTFCH(ch, "%s: raise\n", __func__); in conditional_interrupt()
141 status = ch->regs[DBDMA_STATUS] & DEVSTAT; in conditional_interrupt()
143 sel_mask = (ch->regs[DBDMA_INTR_SEL] >> 16) & 0x0f; in conditional_interrupt()
144 sel_value = ch->regs[DBDMA_INTR_SEL] & 0x0f; in conditional_interrupt()
151 qemu_irq_raise(ch->irq); in conditional_interrupt()
152 DBDMA_DPRINTFCH(ch, "%s: raise\n", __func__); in conditional_interrupt()
157 qemu_irq_raise(ch->irq); in conditional_interrupt()
158 DBDMA_DPRINTFCH(ch, "%s: raise\n", __func__); in conditional_interrupt()
164 static int conditional_wait(DBDMA_channel *ch) in conditional_wait() argument
166 dbdma_cmd *current = &ch->current; in conditional_wait()
178 DBDMA_DPRINTFCH(ch, " [WAIT_ALWAYS]\n"); in conditional_wait()
182 status = ch->regs[DBDMA_STATUS] & DEVSTAT; in conditional_wait()
184 sel_mask = (ch->regs[DBDMA_WAIT_SEL] >> 16) & 0x0f; in conditional_wait()
185 sel_value = ch->regs[DBDMA_WAIT_SEL] & 0x0f; in conditional_wait()
194 DBDMA_DPRINTFCH(ch, " [WAIT_IFSET=%d]\n", res); in conditional_wait()
200 DBDMA_DPRINTFCH(ch, " [WAIT_IFCLR=%d]\n", res); in conditional_wait()
206 static void next(DBDMA_channel *ch) in next() argument
210 ch->regs[DBDMA_STATUS] &= ~BT; in next()
212 cp = ch->regs[DBDMA_CMDPTR_LO]; in next()
213 ch->regs[DBDMA_CMDPTR_LO] = cp + sizeof(dbdma_cmd); in next()
214 dbdma_cmdptr_load(ch); in next()
217 static void branch(DBDMA_channel *ch) in branch() argument
219 dbdma_cmd *current = &ch->current; in branch()
221 ch->regs[DBDMA_CMDPTR_LO] = le32_to_cpu(current->cmd_dep); in branch()
222 ch->regs[DBDMA_STATUS] |= BT; in branch()
223 dbdma_cmdptr_load(ch); in branch()
226 static void conditional_branch(DBDMA_channel *ch) in conditional_branch() argument
228 dbdma_cmd *current = &ch->current; in conditional_branch()
240 next(ch); in conditional_branch()
243 DBDMA_DPRINTFCH(ch, " [BR_ALWAYS]\n"); in conditional_branch()
244 branch(ch); in conditional_branch()
248 status = ch->regs[DBDMA_STATUS] & DEVSTAT; in conditional_branch()
250 sel_mask = (ch->regs[DBDMA_BRANCH_SEL] >> 16) & 0x0f; in conditional_branch()
251 sel_value = ch->regs[DBDMA_BRANCH_SEL] & 0x0f; in conditional_branch()
258 DBDMA_DPRINTFCH(ch, " [BR_IFSET = 1]\n"); in conditional_branch()
259 branch(ch); in conditional_branch()
261 DBDMA_DPRINTFCH(ch, " [BR_IFSET = 0]\n"); in conditional_branch()
262 next(ch); in conditional_branch()
267 DBDMA_DPRINTFCH(ch, " [BR_IFCLR = 1]\n"); in conditional_branch()
268 branch(ch); in conditional_branch()
270 DBDMA_DPRINTFCH(ch, " [BR_IFCLR = 0]\n"); in conditional_branch()
271 next(ch); in conditional_branch()
277 static void channel_run(DBDMA_channel *ch);
281 DBDMA_channel *ch = io->channel; in dbdma_end() local
282 dbdma_cmd *current = &ch->current; in dbdma_end()
284 DBDMA_DPRINTFCH(ch, "%s\n", __func__); in dbdma_end()
286 if (conditional_wait(ch)) in dbdma_end()
289 current->xfer_status = cpu_to_le16(ch->regs[DBDMA_STATUS]); in dbdma_end()
291 dbdma_cmdptr_save(ch); in dbdma_end()
293 ch->regs[DBDMA_STATUS] &= ~FLUSH; in dbdma_end()
295 conditional_interrupt(ch); in dbdma_end()
296 conditional_branch(ch); in dbdma_end()
300 ch->io.processing = false; in dbdma_end()
302 if ((ch->regs[DBDMA_STATUS] & RUN) && in dbdma_end()
303 (ch->regs[DBDMA_STATUS] & ACTIVE)) in dbdma_end()
304 channel_run(ch); in dbdma_end()
307 static void start_output(DBDMA_channel *ch, int key, uint32_t addr, in start_output() argument
310 DBDMA_DPRINTFCH(ch, "start_output\n"); in start_output()
316 DBDMA_DPRINTFCH(ch, "addr 0x%x key 0x%x\n", addr, key); in start_output()
318 kill_channel(ch); in start_output()
322 ch->io.addr = addr; in start_output()
323 ch->io.len = req_count; in start_output()
324 ch->io.is_last = is_last; in start_output()
325 ch->io.dma_end = dbdma_end; in start_output()
326 ch->io.is_dma_out = 1; in start_output()
327 ch->io.processing = true; in start_output()
328 if (ch->rw) { in start_output()
329 ch->rw(&ch->io); in start_output()
333 static void start_input(DBDMA_channel *ch, int key, uint32_t addr, in start_input() argument
336 DBDMA_DPRINTFCH(ch, "start_input\n"); in start_input()
342 DBDMA_DPRINTFCH(ch, "addr 0x%x key 0x%x\n", addr, key); in start_input()
344 kill_channel(ch); in start_input()
348 ch->io.addr = addr; in start_input()
349 ch->io.len = req_count; in start_input()
350 ch->io.is_last = is_last; in start_input()
351 ch->io.dma_end = dbdma_end; in start_input()
352 ch->io.is_dma_out = 0; in start_input()
353 ch->io.processing = true; in start_input()
354 if (ch->rw) { in start_input()
355 ch->rw(&ch->io); in start_input()
359 static void load_word(DBDMA_channel *ch, int key, uint32_t addr, in load_word() argument
362 dbdma_cmd *current = &ch->current; in load_word()
364 DBDMA_DPRINTFCH(ch, "load_word %d bytes, addr=%08x\n", len, addr); in load_word()
370 kill_channel(ch); in load_word()
377 if (conditional_wait(ch)) in load_word()
380 current->xfer_status = cpu_to_le16(ch->regs[DBDMA_STATUS]); in load_word()
381 dbdma_cmdptr_save(ch); in load_word()
382 ch->regs[DBDMA_STATUS] &= ~FLUSH; in load_word()
384 conditional_interrupt(ch); in load_word()
385 next(ch); in load_word()
388 DBDMA_kick(dbdma_from_ch(ch)); in load_word()
391 static void store_word(DBDMA_channel *ch, int key, uint32_t addr, in store_word() argument
394 dbdma_cmd *current = &ch->current; in store_word()
396 DBDMA_DPRINTFCH(ch, "store_word %d bytes, addr=%08x pa=%x\n", in store_word()
403 kill_channel(ch); in store_word()
410 if (conditional_wait(ch)) in store_word()
413 current->xfer_status = cpu_to_le16(ch->regs[DBDMA_STATUS]); in store_word()
414 dbdma_cmdptr_save(ch); in store_word()
415 ch->regs[DBDMA_STATUS] &= ~FLUSH; in store_word()
417 conditional_interrupt(ch); in store_word()
418 next(ch); in store_word()
421 DBDMA_kick(dbdma_from_ch(ch)); in store_word()
424 static void nop(DBDMA_channel *ch) in nop() argument
426 dbdma_cmd *current = &ch->current; in nop()
428 if (conditional_wait(ch)) in nop()
431 current->xfer_status = cpu_to_le16(ch->regs[DBDMA_STATUS]); in nop()
432 dbdma_cmdptr_save(ch); in nop()
434 conditional_interrupt(ch); in nop()
435 conditional_branch(ch); in nop()
438 DBDMA_kick(dbdma_from_ch(ch)); in nop()
441 static void stop(DBDMA_channel *ch) in stop() argument
443 ch->regs[DBDMA_STATUS] &= ~(ACTIVE); in stop()
448 static void channel_run(DBDMA_channel *ch) in channel_run() argument
450 dbdma_cmd *current = &ch->current; in channel_run()
455 DBDMA_DPRINTFCH(ch, "channel_run\n"); in channel_run()
456 dump_dbdma_cmd(ch, current); in channel_run()
460 ch->regs[DBDMA_STATUS] &= ~WAKE; in channel_run()
466 nop(ch); in channel_run()
470 stop(ch); in channel_run()
480 kill_channel(ch); in channel_run()
486 DBDMA_DPRINTFCH(ch, "* OUTPUT_MORE *\n"); in channel_run()
487 start_output(ch, key, phy_addr, req_count, 0); in channel_run()
491 DBDMA_DPRINTFCH(ch, "* OUTPUT_LAST *\n"); in channel_run()
492 start_output(ch, key, phy_addr, req_count, 1); in channel_run()
496 DBDMA_DPRINTFCH(ch, "* INPUT_MORE *\n"); in channel_run()
497 start_input(ch, key, phy_addr, req_count, 0); in channel_run()
501 DBDMA_DPRINTFCH(ch, "* INPUT_LAST *\n"); in channel_run()
502 start_input(ch, key, phy_addr, req_count, 1); in channel_run()
527 DBDMA_DPRINTFCH(ch, "* LOAD_WORD *\n"); in channel_run()
528 load_word(ch, key, phy_addr, req_count); in channel_run()
532 DBDMA_DPRINTFCH(ch, "* STORE_WORD *\n"); in channel_run()
533 store_word(ch, key, phy_addr, req_count); in channel_run()
543 DBDMA_channel *ch = &s->channels[channel]; in DBDMA_run() local
544 uint32_t status = ch->regs[DBDMA_STATUS]; in DBDMA_run()
545 if (!ch->io.processing && (status & RUN) && (status & ACTIVE)) { in DBDMA_run()
546 channel_run(ch); in DBDMA_run()
570 DBDMA_channel *ch = &s->channels[nchan]; in DBDMA_register_channel() local
572 DBDMA_DPRINTFCH(ch, "DBDMA_register_channel 0x%x\n", nchan); in DBDMA_register_channel()
577 ch->irq = irq; in DBDMA_register_channel()
578 ch->rw = rw; in DBDMA_register_channel()
579 ch->flush = flush; in DBDMA_register_channel()
580 ch->io.opaque = opaque; in DBDMA_register_channel()
583 static void dbdma_control_write(DBDMA_channel *ch) in dbdma_control_write() argument
589 mask = (ch->regs[DBDMA_CONTROL] >> 16) & 0xffff; in dbdma_control_write()
590 value = ch->regs[DBDMA_CONTROL] & 0xffff; in dbdma_control_write()
595 status = ch->regs[DBDMA_STATUS]; in dbdma_control_write()
609 DBDMA_DPRINTFCH(ch, " Setting RUN !\n"); in dbdma_control_write()
616 DBDMA_DPRINTFCH(ch, " Clearing RUN !\n"); in dbdma_control_write()
631 DBDMA_DPRINTFCH(ch, " Setting WAKE !\n"); in dbdma_control_write()
640 DBDMA_DPRINTFCH(ch, " %sing PAUSE !\n", in dbdma_control_write()
646 DBDMA_DPRINTFCH(ch, " Setting FLUSH !\n"); in dbdma_control_write()
653 ch->regs[DBDMA_STATUS] |= FLUSH; in dbdma_control_write()
664 DBDMA_DPRINTFCH(ch, " -> ACTIVE down !\n"); in dbdma_control_write()
675 DBDMA_DPRINTFCH(ch, " -> ACTIVE up !\n"); in dbdma_control_write()
678 DBDMA_DPRINTFCH(ch, " -> ACTIVE up !\n"); in dbdma_control_write()
681 DBDMA_DPRINTFCH(ch, " new status=0x%08x\n", status); in dbdma_control_write()
686 if (do_flush && ch->flush) { in dbdma_control_write()
687 ch->flush(&ch->io); in dbdma_control_write()
691 ch->regs[DBDMA_STATUS] = status; in dbdma_control_write()
695 DBDMA_kick(dbdma_from_ch(ch)); in dbdma_control_write()
704 DBDMA_channel *ch = &s->channels[channel]; in dbdma_write() local
707 DBDMA_DPRINTFCH(ch, "writel 0x" HWADDR_FMT_plx " <= 0x%08"PRIx64"\n", in dbdma_write()
709 DBDMA_DPRINTFCH(ch, "channel 0x%x reg 0x%x\n", in dbdma_write()
714 if (reg == DBDMA_CMDPTR_LO && (ch->regs[DBDMA_STATUS] & ACTIVE)) { in dbdma_write()
718 ch->regs[reg] = value; in dbdma_write()
722 dbdma_control_write(ch); in dbdma_write()
726 ch->regs[DBDMA_CMDPTR_LO] &= ~0xf; in dbdma_write()
727 dbdma_cmdptr_load(ch); in dbdma_write()
756 DBDMA_channel *ch = &s->channels[channel]; in dbdma_read() local
759 value = ch->regs[reg]; in dbdma_read()
763 value = ch->regs[DBDMA_STATUS]; in dbdma_read()
789 DBDMA_DPRINTFCH(ch, "readl 0x" HWADDR_FMT_plx " => 0x%08x\n", addr, value); in dbdma_read()
790 DBDMA_DPRINTFCH(ch, "channel 0x%x reg 0x%x\n", in dbdma_read()
871 DBDMA_channel *ch = io->channel; in dbdma_unassigned_rw() local
872 dbdma_cmd *current = &ch->current; in dbdma_unassigned_rw()
875 __func__, ch->channel); in dbdma_unassigned_rw()
876 ch->io.processing = false; in dbdma_unassigned_rw()
881 current->xfer_status = cpu_to_le16(ch->regs[DBDMA_STATUS]); in dbdma_unassigned_rw()
883 dbdma_cmdptr_save(ch); in dbdma_unassigned_rw()
889 DBDMA_channel *ch = io->channel; in dbdma_unassigned_flush() local
891 __func__, ch->channel); in dbdma_unassigned_flush()
901 DBDMA_channel *ch = &s->channels[i]; in mac_dbdma_init() local
903 ch->rw = dbdma_unassigned_rw; in mac_dbdma_init()
904 ch->flush = dbdma_unassigned_flush; in mac_dbdma_init()
905 ch->channel = i; in mac_dbdma_init()
906 ch->io.channel = ch; in mac_dbdma_init()