4  * i.MX 8M Plus ANALOG IP block emulation code
23     memset(s->analog, 0, sizeof(s->analog));  in imx8mp_analog_reset()
25     s->analog[ANALOG_AUDIO_PLL1_GEN_CTRL] = 0x00002010;  in imx8mp_analog_reset()
26     s->analog[ANALOG_AUDIO_PLL1_FDIV_CTL0] = 0x00145032;  in imx8mp_analog_reset()
27     s->analog[ANALOG_AUDIO_PLL1_FDIV_CTL1] = 0x00000000;  in imx8mp_analog_reset()
28     s->analog[ANALOG_AUDIO_PLL1_SSCG_CTRL] = 0x00000000;  in imx8mp_analog_reset()
29     s->analog[ANALOG_AUDIO_PLL1_MNIT_CTRL] = 0x00100103;  in imx8mp_analog_reset()
30     s->analog[ANALOG_AUDIO_PLL2_GEN_CTRL] = 0x00002010;  in imx8mp_analog_reset()
31     s->analog[ANALOG_AUDIO_PLL2_FDIV_CTL0] = 0x00145032;  in imx8mp_analog_reset()
32     s->analog[ANALOG_AUDIO_PLL2_FDIV_CTL1] = 0x00000000;  in imx8mp_analog_reset()
33     s->analog[ANALOG_AUDIO_PLL2_SSCG_CTRL] = 0x00000000;  in imx8mp_analog_reset()
34     s->analog[ANALOG_AUDIO_PLL2_MNIT_CTRL] = 0x00100103;  in imx8mp_analog_reset()
35     s->analog[ANALOG_VIDEO_PLL1_GEN_CTRL] = 0x00002010;  in imx8mp_analog_reset()
36     s->analog[ANALOG_VIDEO_PLL1_FDIV_CTL0] = 0x00145032;  in imx8mp_analog_reset()
37     s->analog[ANALOG_VIDEO_PLL1_FDIV_CTL1] = 0x00000000;  in imx8mp_analog_reset()
38     s->analog[ANALOG_VIDEO_PLL1_SSCG_CTRL] = 0x00000000;  in imx8mp_analog_reset()
39     s->analog[ANALOG_VIDEO_PLL1_MNIT_CTRL] = 0x00100103;  in imx8mp_analog_reset()
40     s->analog[ANALOG_DRAM_PLL_GEN_CTRL] = 0x00002010;  in imx8mp_analog_reset()
41     s->analog[ANALOG_DRAM_PLL_FDIV_CTL0] = 0x0012c032;  in imx8mp_analog_reset()
42     s->analog[ANALOG_DRAM_PLL_FDIV_CTL1] = 0x00000000;  in imx8mp_analog_reset()
43     s->analog[ANALOG_DRAM_PLL_SSCG_CTRL] = 0x00000000;  in imx8mp_analog_reset()
44     s->analog[ANALOG_DRAM_PLL_MNIT_CTRL] = 0x00100103;  in imx8mp_analog_reset()
45     s->analog[ANALOG_GPU_PLL_GEN_CTRL] = 0x00000810;  in imx8mp_analog_reset()
46     s->analog[ANALOG_GPU_PLL_FDIV_CTL0] = 0x000c8031;  in imx8mp_analog_reset()
47     s->analog[ANALOG_GPU_PLL_LOCKD_CTRL] = 0x0010003f;  in imx8mp_analog_reset()
48     s->analog[ANALOG_GPU_PLL_MNIT_CTRL] = 0x00280081;  in imx8mp_analog_reset()
49     s->analog[ANALOG_VPU_PLL_GEN_CTRL] = 0x00000810;  in imx8mp_analog_reset()
50     s->analog[ANALOG_VPU_PLL_FDIV_CTL0] = 0x0012c032;  in imx8mp_analog_reset()
51     s->analog[ANALOG_VPU_PLL_LOCKD_CTRL] = 0x0010003f;  in imx8mp_analog_reset()
52     s->analog[ANALOG_VPU_PLL_MNIT_CTRL] = 0x00280081;  in imx8mp_analog_reset()
53     s->analog[ANALOG_ARM_PLL_GEN_CTRL] = 0x00000810;  in imx8mp_analog_reset()
54     s->analog[ANALOG_ARM_PLL_FDIV_CTL0] = 0x000fa031;  in imx8mp_analog_reset()
55     s->analog[ANALOG_ARM_PLL_LOCKD_CTRL] = 0x0010003f;  in imx8mp_analog_reset()
56     s->analog[ANALOG_ARM_PLL_MNIT_CTRL] = 0x00280081;  in imx8mp_analog_reset()
57     s->analog[ANALOG_SYS_PLL1_GEN_CTRL] = 0x0aaaa810;  in imx8mp_analog_reset()
58     s->analog[ANALOG_SYS_PLL1_FDIV_CTL0] = 0x00190032;  in imx8mp_analog_reset()
59     s->analog[ANALOG_SYS_PLL1_LOCKD_CTRL] = 0x0010003f;  in imx8mp_analog_reset()
60     s->analog[ANALOG_SYS_PLL1_MNIT_CTRL] = 0x00280081;  in imx8mp_analog_reset()
61     s->analog[ANALOG_SYS_PLL2_GEN_CTRL] = 0x0aaaa810;  in imx8mp_analog_reset()
62     s->analog[ANALOG_SYS_PLL2_FDIV_CTL0] = 0x000fa031;  in imx8mp_analog_reset()
63     s->analog[ANALOG_SYS_PLL2_LOCKD_CTRL] = 0x0010003f;  in imx8mp_analog_reset()
64     s->analog[ANALOG_SYS_PLL2_MNIT_CTRL] = 0x00280081;  in imx8mp_analog_reset()
65     s->analog[ANALOG_SYS_PLL3_GEN_CTRL] = 0x00000810;  in imx8mp_analog_reset()
66     s->analog[ANALOG_SYS_PLL3_FDIV_CTL0] = 0x000fa031;  in imx8mp_analog_reset()
67     s->analog[ANALOG_SYS_PLL3_LOCKD_CTRL] = 0x0010003f;  in imx8mp_analog_reset()
68     s->analog[ANALOG_SYS_PLL3_MNIT_CTRL] = 0x00280081;  in imx8mp_analog_reset()
69     s->analog[ANALOG_OSC_MISC_CFG] = 0x00000000;  in imx8mp_analog_reset()
70     s->analog[ANALOG_ANAMIX_PLL_MNIT_CTL] = 0x00000000;  in imx8mp_analog_reset()
71     s->analog[ANALOG_DIGPROG] = 0x00824010;  in imx8mp_analog_reset()
74     s->analog[ANALOG_AUDIO_PLL1_GEN_CTRL] |= ANALOG_PLL_LOCK;  in imx8mp_analog_reset()
75     s->analog[ANALOG_AUDIO_PLL2_GEN_CTRL] |= ANALOG_PLL_LOCK;  in imx8mp_analog_reset()
76     s->analog[ANALOG_VIDEO_PLL1_GEN_CTRL] |= ANALOG_PLL_LOCK;  in imx8mp_analog_reset()
77     s->analog[ANALOG_DRAM_PLL_GEN_CTRL] |= ANALOG_PLL_LOCK;  in imx8mp_analog_reset()
78     s->analog[ANALOG_GPU_PLL_GEN_CTRL] |= ANALOG_PLL_LOCK;  in imx8mp_analog_reset()
79     s->analog[ANALOG_VPU_PLL_GEN_CTRL] |= ANALOG_PLL_LOCK;  in imx8mp_analog_reset()
80     s->analog[ANALOG_ARM_PLL_GEN_CTRL] |= ANALOG_PLL_LOCK;  in imx8mp_analog_reset()
81     s->analog[ANALOG_SYS_PLL1_GEN_CTRL] |= ANALOG_PLL_LOCK;  in imx8mp_analog_reset()
82     s->analog[ANALOG_SYS_PLL2_GEN_CTRL] |= ANALOG_PLL_LOCK;  in imx8mp_analog_reset()
83     s->analog[ANALOG_SYS_PLL3_GEN_CTRL] |= ANALOG_PLL_LOCK;  in imx8mp_analog_reset()
90     return s->analog[offset >> 2];  in imx8mp_analog_read()
102         s->analog[offset >> 2] = value;  in imx8mp_analog_write()
124     memory_region_init_io(&s->mmio.analog, obj, &imx8mp_analog_ops, s,  in imx8mp_analog_init()
125                           TYPE_IMX8MP_ANALOG, sizeof(s->analog));  in imx8mp_analog_init()
126     memory_region_add_subregion(&s->mmio.container, 0, &s->mmio.analog);  in imx8mp_analog_init()
136         VMSTATE_UINT32_ARRAY(analog, IMX8MPAnalogState, ANALOG_MAX),
147     dc->desc  = "i.MX 8M Plus Analog Module";  in imx8mp_analog_class_init()