Lines Matching +full:rom +full:- +full:addr
4 * Copyright (c) 2003-2005 Fabrice Bellard
31 #include "hw/qdev-properties.h"
34 #include "qemu/error-report.h"
58 #define TYPE_TCX "sun-tcx"
69 MemoryRegion rom; member
99 static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len) in tcx_set_dirty() argument
101 memory_region_set_dirty(&s->vram_mem, addr, len); in tcx_set_dirty()
103 if (s->depth == 24) { in tcx_set_dirty()
104 memory_region_set_dirty(&s->vram_mem, s->vram24_offset + addr * 4, in tcx_set_dirty()
106 memory_region_set_dirty(&s->vram_mem, s->cplane_offset + addr * 4, in tcx_set_dirty()
112 ram_addr_t addr, int len) in tcx_check_dirty() argument
116 ret = memory_region_snapshot_get_dirty(&s->vram_mem, snap, addr, len); in tcx_check_dirty()
118 if (s->depth == 24) { in tcx_check_dirty()
119 ret |= memory_region_snapshot_get_dirty(&s->vram_mem, snap, in tcx_check_dirty()
120 s->vram24_offset + addr * 4, len * 4); in tcx_check_dirty()
121 ret |= memory_region_snapshot_get_dirty(&s->vram_mem, snap, in tcx_check_dirty()
122 s->cplane_offset + addr * 4, len * 4); in tcx_check_dirty()
133 s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]); in update_palette_entries()
135 tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); in update_palette_entries()
147 *p++ = s1->palette[val]; in tcx_draw_line32()
158 y = y - s1->cursy; in tcx_draw_cursor32()
159 mask = s1->cursmask[y]; in tcx_draw_cursor32()
160 bits = s1->cursbits[y]; in tcx_draw_cursor32()
161 len = MIN(width - s1->cursx, 32); in tcx_draw_cursor32()
162 p = &p[s1->cursx]; in tcx_draw_cursor32()
166 *p = s1->palette[259]; in tcx_draw_cursor32()
168 *p = s1->palette[258]; in tcx_draw_cursor32()
192 /* 24-bit direct, BGR order */ in tcx24_draw_line32()
200 /* 8-bit pseudocolor */ in tcx24_draw_line32()
202 dval = s1->palette[val]; in tcx24_draw_line32()
215 DisplaySurface *surface = qemu_console_surface(ts->con); in tcx_update_display()
224 y_start = -1; in tcx_update_display()
226 s = ts->vram; in tcx_update_display()
230 snap = memory_region_snapshot_and_clear_dirty(&ts->vram_mem, 0x0, in tcx_update_display()
231 memory_region_size(&ts->vram_mem), in tcx_update_display()
234 for (y = 0; y < ts->height; y++, page += ds) { in tcx_update_display()
239 tcx_draw_line32(ts, d, s, ts->width); in tcx_update_display()
240 if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { in tcx_update_display()
241 tcx_draw_cursor32(ts, d, y, ts->width); in tcx_update_display()
246 dpy_gfx_update(ts->con, 0, y_start, in tcx_update_display()
247 ts->width, y - y_start); in tcx_update_display()
248 y_start = -1; in tcx_update_display()
256 dpy_gfx_update(ts->con, 0, y_start, in tcx_update_display()
257 ts->width, y - y_start); in tcx_update_display()
265 DisplaySurface *surface = qemu_console_surface(ts->con); in tcx24_update_display()
275 y_start = -1; in tcx24_update_display()
277 s = ts->vram; in tcx24_update_display()
278 s24 = ts->vram24; in tcx24_update_display()
279 cptr = ts->cplane; in tcx24_update_display()
283 snap = memory_region_snapshot_and_clear_dirty(&ts->vram_mem, 0x0, in tcx24_update_display()
284 memory_region_size(&ts->vram_mem), in tcx24_update_display()
287 for (y = 0; y < ts->height; y++, page += ds) { in tcx24_update_display()
292 tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); in tcx24_update_display()
293 if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) { in tcx24_update_display()
294 tcx_draw_cursor32(ts, d, y, ts->width); in tcx24_update_display()
299 dpy_gfx_update(ts->con, 0, y_start, in tcx24_update_display()
300 ts->width, y - y_start); in tcx24_update_display()
301 y_start = -1; in tcx24_update_display()
311 dpy_gfx_update(ts->con, 0, y_start, in tcx24_update_display()
312 ts->width, y - y_start); in tcx24_update_display()
321 tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); in tcx_invalidate_display()
322 qemu_console_resize(s->con, s->width, s->height); in tcx_invalidate_display()
329 tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); in tcx24_invalidate_display()
330 qemu_console_resize(s->con, s->width, s->height); in tcx24_invalidate_display()
338 tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); in vmstate_tcx_post_load()
365 memset(s->r, 0, 260); in tcx_reset()
366 memset(s->g, 0, 260); in tcx_reset()
367 memset(s->b, 0, 260); in tcx_reset()
368 s->r[255] = s->g[255] = s->b[255] = 255; in tcx_reset()
369 s->r[256] = s->g[256] = s->b[256] = 255; in tcx_reset()
370 s->r[258] = s->g[258] = s->b[258] = 255; in tcx_reset()
372 memset(s->vram, 0, MAXX*MAXY); in tcx_reset()
373 memory_region_reset_dirty(&s->vram_mem, 0, MAXX * MAXY * (1 + 4 + 4), in tcx_reset()
375 s->dac_index = 0; in tcx_reset()
376 s->dac_state = 0; in tcx_reset()
377 s->cursx = 0xf000; /* Put cursor off screen */ in tcx_reset()
378 s->cursy = 0xf000; in tcx_reset()
381 static uint64_t tcx_dac_readl(void *opaque, hwaddr addr, in tcx_dac_readl() argument
387 switch (s->dac_state) { in tcx_dac_readl()
389 val = s->r[s->dac_index] << 24; in tcx_dac_readl()
390 s->dac_state++; in tcx_dac_readl()
393 val = s->g[s->dac_index] << 24; in tcx_dac_readl()
394 s->dac_state++; in tcx_dac_readl()
397 val = s->b[s->dac_index] << 24; in tcx_dac_readl()
398 s->dac_index = (s->dac_index + 1) & 0xff; /* Index autoincrement */ in tcx_dac_readl()
401 s->dac_state = 0; in tcx_dac_readl()
408 static void tcx_dac_writel(void *opaque, hwaddr addr, uint64_t val, in tcx_dac_writel() argument
414 switch (addr) { in tcx_dac_writel()
416 s->dac_index = val >> 24; in tcx_dac_writel()
417 s->dac_state = 0; in tcx_dac_writel()
421 if (addr & 8) { in tcx_dac_writel()
422 index = (s->dac_index & 3) + 256; in tcx_dac_writel()
424 index = s->dac_index; in tcx_dac_writel()
426 switch (s->dac_state) { in tcx_dac_writel()
428 s->r[index] = val >> 24; in tcx_dac_writel()
430 s->dac_state++; in tcx_dac_writel()
433 s->g[index] = val >> 24; in tcx_dac_writel()
435 s->dac_state++; in tcx_dac_writel()
438 s->b[index] = val >> 24; in tcx_dac_writel()
440 s->dac_index = (s->dac_index + 1) & 0xff; /* Index autoincrement */ in tcx_dac_writel()
443 s->dac_state = 0; in tcx_dac_writel()
462 static uint64_t tcx_stip_readl(void *opaque, hwaddr addr, in tcx_stip_readl() argument
468 static void tcx_stip_writel(void *opaque, hwaddr addr, in tcx_stip_writel() argument
475 if (!(addr & 4)) { in tcx_stip_writel()
476 s->tmpblit = val; in tcx_stip_writel()
478 addr = (addr >> 3) & 0xfffff; in tcx_stip_writel()
479 col = cpu_to_be32(s->tmpblit); in tcx_stip_writel()
480 if (s->depth == 24) { in tcx_stip_writel()
483 s->vram[addr + i] = s->tmpblit; in tcx_stip_writel()
484 s->vram24[addr + i] = col; in tcx_stip_writel()
491 s->vram[addr + i] = s->tmpblit; in tcx_stip_writel()
496 tcx_set_dirty(s, addr, 32); in tcx_stip_writel()
500 static void tcx_rstip_writel(void *opaque, hwaddr addr, in tcx_rstip_writel() argument
507 if (!(addr & 4)) { in tcx_rstip_writel()
508 s->tmpblit = val; in tcx_rstip_writel()
510 addr = (addr >> 3) & 0xfffff; in tcx_rstip_writel()
511 col = cpu_to_be32(s->tmpblit); in tcx_rstip_writel()
512 if (s->depth == 24) { in tcx_rstip_writel()
515 s->vram[addr + i] = s->tmpblit; in tcx_rstip_writel()
516 s->vram24[addr + i] = col; in tcx_rstip_writel()
517 s->cplane[addr + i] = col; in tcx_rstip_writel()
524 s->vram[addr + i] = s->tmpblit; in tcx_rstip_writel()
529 tcx_set_dirty(s, addr, 32); in tcx_rstip_writel()
561 static uint64_t tcx_blit_readl(void *opaque, hwaddr addr, in tcx_blit_readl() argument
567 static void tcx_blit_writel(void *opaque, hwaddr addr, in tcx_blit_writel() argument
574 if (!(addr & 4)) { in tcx_blit_writel()
575 s->tmpblit = val; in tcx_blit_writel()
577 addr = (addr >> 3) & 0xfffff; in tcx_blit_writel()
581 memset(&s->vram[addr], s->tmpblit, len); in tcx_blit_writel()
582 if (s->depth == 24) { in tcx_blit_writel()
583 val = s->tmpblit & 0xffffff; in tcx_blit_writel()
586 s->vram24[addr + i] = val; in tcx_blit_writel()
590 memcpy(&s->vram[addr], &s->vram[adsr], len); in tcx_blit_writel()
591 if (s->depth == 24) { in tcx_blit_writel()
592 memcpy(&s->vram24[addr], &s->vram24[adsr], len * 4); in tcx_blit_writel()
595 tcx_set_dirty(s, addr, len); in tcx_blit_writel()
599 static void tcx_rblit_writel(void *opaque, hwaddr addr, in tcx_rblit_writel() argument
606 if (!(addr & 4)) { in tcx_rblit_writel()
607 s->tmpblit = val; in tcx_rblit_writel()
609 addr = (addr >> 3) & 0xfffff; in tcx_rblit_writel()
613 memset(&s->vram[addr], s->tmpblit, len); in tcx_rblit_writel()
614 if (s->depth == 24) { in tcx_rblit_writel()
615 val = s->tmpblit & 0xffffff; in tcx_rblit_writel()
618 s->vram24[addr + i] = val; in tcx_rblit_writel()
619 s->cplane[addr + i] = val; in tcx_rblit_writel()
623 memcpy(&s->vram[addr], &s->vram[adsr], len); in tcx_rblit_writel()
624 if (s->depth == 24) { in tcx_rblit_writel()
625 memcpy(&s->vram24[addr], &s->vram24[adsr], len * 4); in tcx_rblit_writel()
626 memcpy(&s->cplane[addr], &s->cplane[adsr], len * 4); in tcx_rblit_writel()
629 tcx_set_dirty(s, addr, len); in tcx_rblit_writel()
666 ymin = s->cursy; in tcx_invalidate_cursor_position()
667 if (ymin >= s->height) { in tcx_invalidate_cursor_position()
670 ymax = MIN(s->height, ymin + 32); in tcx_invalidate_cursor_position()
674 tcx_set_dirty(s, start, end - start); in tcx_invalidate_cursor_position()
677 static uint64_t tcx_thc_readl(void *opaque, hwaddr addr, in tcx_thc_readl() argument
683 if (addr == TCX_THC_MISC) { in tcx_thc_readl()
684 val = s->thcmisc | 0x02000000; in tcx_thc_readl()
691 static void tcx_thc_writel(void *opaque, hwaddr addr, in tcx_thc_writel() argument
696 if (addr == TCX_THC_CURSXY) { in tcx_thc_writel()
698 s->cursx = val >> 16; in tcx_thc_writel()
699 s->cursy = val; in tcx_thc_writel()
701 } else if (addr >= TCX_THC_CURSMASK && addr < TCX_THC_CURSMASK + 128) { in tcx_thc_writel()
702 s->cursmask[(addr - TCX_THC_CURSMASK) >> 2] = val; in tcx_thc_writel()
704 } else if (addr >= TCX_THC_CURSBITS && addr < TCX_THC_CURSBITS + 128) { in tcx_thc_writel()
705 s->cursbits[(addr - TCX_THC_CURSBITS) >> 2] = val; in tcx_thc_writel()
707 } else if (addr == TCX_THC_MISC) { in tcx_thc_writel()
708 s->thcmisc = val; in tcx_thc_writel()
723 static uint64_t tcx_dummy_readl(void *opaque, hwaddr addr, in tcx_dummy_readl() argument
729 static void tcx_dummy_writel(void *opaque, hwaddr addr, in tcx_dummy_writel() argument
760 memory_region_init_rom_nomigrate(&s->rom, obj, "tcx.prom", in tcx_initfn()
762 sysbus_init_mmio(sbd, &s->rom); in tcx_initfn()
765 memory_region_init_io(&s->stip, obj, &tcx_stip_ops, s, "tcx.stip", in tcx_initfn()
767 sysbus_init_mmio(sbd, &s->stip); in tcx_initfn()
770 memory_region_init_io(&s->blit, obj, &tcx_blit_ops, s, "tcx.blit", in tcx_initfn()
772 sysbus_init_mmio(sbd, &s->blit); in tcx_initfn()
775 memory_region_init_io(&s->rstip, obj, &tcx_rstip_ops, s, "tcx.rstip", in tcx_initfn()
777 sysbus_init_mmio(sbd, &s->rstip); in tcx_initfn()
780 memory_region_init_io(&s->rblit, obj, &tcx_rblit_ops, s, "tcx.rblit", in tcx_initfn()
782 sysbus_init_mmio(sbd, &s->rblit); in tcx_initfn()
785 memory_region_init_io(&s->tec, obj, &tcx_dummy_ops, s, "tcx.tec", in tcx_initfn()
787 sysbus_init_mmio(sbd, &s->tec); in tcx_initfn()
790 memory_region_init_io(&s->dac, obj, &tcx_dac_ops, s, "tcx.dac", in tcx_initfn()
792 sysbus_init_mmio(sbd, &s->dac); in tcx_initfn()
795 memory_region_init_io(&s->thc, obj, &tcx_thc_ops, s, "tcx.thc", in tcx_initfn()
797 sysbus_init_mmio(sbd, &s->thc); in tcx_initfn()
800 memory_region_init_io(&s->dhc, obj, &tcx_dummy_ops, s, "tcx.dhc", in tcx_initfn()
802 sysbus_init_mmio(sbd, &s->dhc); in tcx_initfn()
805 memory_region_init_io(&s->alt, obj, &tcx_dummy_ops, s, "tcx.alt", in tcx_initfn()
807 sysbus_init_mmio(sbd, &s->alt); in tcx_initfn()
819 memory_region_init_ram_nomigrate(&s->vram_mem, OBJECT(s), "tcx.vram", in tcx_realizefn()
820 s->vram_size * (1 + 4 + 4), &error_fatal); in tcx_realizefn()
821 vmstate_register_ram_global(&s->vram_mem); in tcx_realizefn()
822 memory_region_set_log(&s->vram_mem, true, DIRTY_MEMORY_VGA); in tcx_realizefn()
823 vram_base = memory_region_get_ram_ptr(&s->vram_mem); in tcx_realizefn()
825 /* 10/ROM : FCode ROM */ in tcx_realizefn()
826 vmstate_register_ram_global(&s->rom); in tcx_realizefn()
829 ret = load_image_mr(fcode_filename, &s->rom); in tcx_realizefn()
836 /* 0/DFB8 : 8-bit plane */ in tcx_realizefn()
837 s->vram = vram_base; in tcx_realizefn()
838 size = s->vram_size; in tcx_realizefn()
839 memory_region_init_alias(&s->vram_8bit, OBJECT(s), "tcx.vram.8bit", in tcx_realizefn()
840 &s->vram_mem, vram_offset, size); in tcx_realizefn()
841 sysbus_init_mmio(sbd, &s->vram_8bit); in tcx_realizefn()
846 size = s->vram_size * 4; in tcx_realizefn()
847 s->vram24 = (uint32_t *)vram_base; in tcx_realizefn()
848 s->vram24_offset = vram_offset; in tcx_realizefn()
849 memory_region_init_alias(&s->vram_24bit, OBJECT(s), "tcx.vram.24bit", in tcx_realizefn()
850 &s->vram_mem, vram_offset, size); in tcx_realizefn()
851 sysbus_init_mmio(sbd, &s->vram_24bit); in tcx_realizefn()
856 size = s->vram_size * 4; in tcx_realizefn()
857 s->cplane = (uint32_t *)vram_base; in tcx_realizefn()
858 s->cplane_offset = vram_offset; in tcx_realizefn()
859 memory_region_init_alias(&s->vram_cplane, OBJECT(s), "tcx.vram.cplane", in tcx_realizefn()
860 &s->vram_mem, vram_offset, size); in tcx_realizefn()
861 sysbus_init_mmio(sbd, &s->vram_cplane); in tcx_realizefn()
863 /* 9/THC24bits : NetBSD writes here even with 8-bit display: dummy */ in tcx_realizefn()
864 if (s->depth == 8) { in tcx_realizefn()
865 memory_region_init_io(&s->thc24, OBJECT(s), &tcx_dummy_ops, s, in tcx_realizefn()
867 sysbus_init_mmio(sbd, &s->thc24); in tcx_realizefn()
870 sysbus_init_irq(sbd, &s->irq); in tcx_realizefn()
872 if (s->depth == 8) { in tcx_realizefn()
873 s->con = graphic_console_init(dev, 0, &tcx_ops, s); in tcx_realizefn()
875 s->con = graphic_console_init(dev, 0, &tcx24_ops, s); in tcx_realizefn()
877 s->thcmisc = 0; in tcx_realizefn()
879 qemu_console_resize(s->con, s->width, s->height); in tcx_realizefn()
883 DEFINE_PROP_UINT32("vram_size", TCXState, vram_size, -1),
884 DEFINE_PROP_UINT16("width", TCXState, width, -1),
885 DEFINE_PROP_UINT16("height", TCXState, height, -1),
886 DEFINE_PROP_UINT16("depth", TCXState, depth, -1),
893 dc->realize = tcx_realizefn; in tcx_class_init()
895 dc->vmsd = &vmstate_tcx; in tcx_class_init()