24     qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level);  in mpcore_priv_set_irq()
31     DeviceState *gicdev = DEVICE(&s->gic);  in mpcore_priv_map_setup()
32     SysBusDevice *gicbusdev = SYS_BUS_DEVICE(&s->gic);  in mpcore_priv_map_setup()
38     /* GIC CPU interfaces: "current CPU" at 0x100, then specific CPUs  in mpcore_priv_map_setup()
76     DeviceState *gicdev = DEVICE(&s->gic);  in mpcore_priv_realize()
91     if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) {  in mpcore_priv_realize()
95     /* Pass through outbound IRQ lines from the GIC */  in mpcore_priv_realize()
96     sysbus_pass_irq(sbd, SYS_BUS_DEVICE(&s->gic));  in mpcore_priv_realize()
98     /* Pass through inbound GPIO lines to the GIC */  in mpcore_priv_realize()
125     object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC);  in mpcore_priv_initfn()
126     /* Request the legacy 11MPCore GIC behaviour: */  in mpcore_priv_initfn()
127     qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 0);  in mpcore_priv_initfn()