Lines Matching refs:lsr

114         s->lsr |= UART_LSR_OE;  in recv_fifo_put()
122 if ((s->ier & UART_IER_RLSI) && (s->lsr & UART_LSR_INT_ANY)) { in serial_update_irq()
129 } else if ((s->ier & UART_IER_RDI) && (s->lsr & UART_LSR_DR) && in serial_update_irq()
235 assert(!(s->lsr & UART_LSR_TEMT)); in serial_xmit()
237 assert(!(s->lsr & UART_LSR_THRE)); in serial_xmit()
243 s->lsr |= UART_LSR_THRE; in serial_xmit()
247 s->lsr |= UART_LSR_THRE; in serial_xmit()
249 if ((s->lsr & UART_LSR_THRE) && !s->thr_ipending) { in serial_xmit()
278 } while (!(s->lsr & UART_LSR_THRE)); in serial_xmit()
281 s->lsr |= UART_LSR_TEMT; in serial_xmit()
355 s->lsr &= ~UART_LSR_THRE; in serial_ioport_write()
356 s->lsr &= ~UART_LSR_TEMT; in serial_ioport_write()
395 if ((s->ier & UART_IER_THRI) && (s->lsr & UART_LSR_THRE)) { in serial_ioport_write()
416 s->lsr &= ~(UART_LSR_DR | UART_LSR_BI); in serial_ioport_write()
423 s->lsr |= UART_LSR_THRE; in serial_ioport_write()
485 s->lsr &= ~(UART_LSR_DR | UART_LSR_BI); in serial_ioport_read()
492 s->lsr &= ~(UART_LSR_DR | UART_LSR_BI); in serial_ioport_read()
522 ret = s->lsr; in serial_ioport_read()
524 if (s->lsr & (UART_LSR_BI|UART_LSR_OE)) { in serial_ioport_read()
525 s->lsr &= ~(UART_LSR_BI|UART_LSR_OE); in serial_ioport_read()
572 return !(s->lsr & UART_LSR_DR); in serial_can_receive()
581 s->lsr |= UART_LSR_BI | UART_LSR_DR; in serial_receive_break()
612 s->lsr |= UART_LSR_DR; in serial_receive1()
616 if (s->lsr & UART_LSR_DR) in serial_receive1()
617 s->lsr |= UART_LSR_OE; in serial_receive1()
619 s->lsr |= UART_LSR_DR; in serial_receive1()
660 if (s->lsr & UART_LSR_TEMT) { in serial_post_load()
675 if (!(s->lsr & UART_LSR_TEMT)) { in serial_post_load()
836 VMSTATE_UINT8(lsr, SerialState),
867 s->lsr = UART_LSR_TEMT | UART_LSR_THRE; in serial_reset()