63 #define PARA_STS_TMOUT  0x01    /* EPP timeout */
171             /* Controls not correct for EPP address cycle, so do nothing */  in parallel_ioport_write_hw()
186             /* Controls not correct for EPP data cycle, so do nothing */  in parallel_ioport_write_hw()
211     trace_parallel_ioport_write("EPP", addr, val);  in parallel_ioport_eppdata_write_hw2()
213         /* Controls not correct for EPP data cycle, so do nothing */  in parallel_ioport_eppdata_write_hw2()
236     trace_parallel_ioport_write("EPP", addr, val);  in parallel_ioport_eppdata_write_hw4()
238         /* Controls not correct for EPP data cycle, so do nothing */  in parallel_ioport_eppdata_write_hw4()
326             /* Controls not correct for EPP addr cycle, so do nothing */  in parallel_ioport_read_hw()
342             /* Controls not correct for EPP data cycle, so do nothing */  in parallel_ioport_read_hw()
371         /* Controls not correct for EPP data cycle, so do nothing */  in parallel_ioport_eppdata_read_hw2()
384     trace_parallel_ioport_read("EPP", addr, ret);  in parallel_ioport_eppdata_read_hw2()
399         /* Controls not correct for EPP data cycle, so do nothing */  in parallel_ioport_eppdata_read_hw4()
412     trace_parallel_ioport_read("EPP", addr, ret);  in parallel_ioport_eppdata_read_hw4()