Lines Matching +full:cfi +full:- +full:flash
2 * CFI parallel flash with AMD command set emulation
23 * - flash read
24 * - flash write
25 * - flash ID read
26 * - sector erase
27 * - chip erase
28 * - unlock bypass command
29 * - CFI queries
31 * It does not support flash interleaving.
37 #include "hw/block/flash.h"
38 #include "hw/qdev-properties.h"
39 #include "hw/qdev-properties-system.h"
41 #include "qemu/error-report.h"
44 #include "sysemu/block-backend.h"
45 #include "qemu/host-utils.h"
60 /* Special write cycles for CFI queries. */
81 int wcycle; /* if 0, the flash is read normally */
96 * The device replicates the flash memory across its memory space. Emulate
98 * (.mem_mappings) pointing to the flash memory (.orig_mem).
104 int read_counter; /* used for lazy switch-back to rom mode */
117 pfl->status ^= 0x80; in toggle_dq7()
125 pfl->status &= 0x7F; in set_dq7()
126 pfl->status |= value & 0x80; in set_dq7()
134 pfl->status ^= 0x40; in toggle_dq6()
142 pfl->status |= 0x08; in assert_dq3()
150 pfl->status &= ~0x08; in reset_dq3()
158 pfl->status ^= 0x04; in toggle_dq2()
167 hwaddr size = memory_region_size(&pfl->orig_mem); in pflash_setup_mappings()
169 memory_region_init(&pfl->mem, OBJECT(pfl), "pflash", pfl->mappings * size); in pflash_setup_mappings()
170 pfl->mem_mappings = g_new(MemoryRegion, pfl->mappings); in pflash_setup_mappings()
171 for (i = 0; i < pfl->mappings; ++i) { in pflash_setup_mappings()
172 memory_region_init_alias(&pfl->mem_mappings[i], OBJECT(pfl), in pflash_setup_mappings()
173 "pflash-alias", &pfl->orig_mem, 0, size); in pflash_setup_mappings()
174 memory_region_add_subregion(&pfl->mem, i * size, &pfl->mem_mappings[i]); in pflash_setup_mappings()
180 trace_pflash_reset(pfl->name); in pflash_reset_state_machine()
181 pfl->cmd = 0x00; in pflash_reset_state_machine()
182 pfl->wcycle = 0; in pflash_reset_state_machine()
187 trace_pflash_mode_read_array(pfl->name); in pflash_mode_read_array()
189 pfl->rom_mode = true; in pflash_mode_read_array()
190 memory_region_rom_device_set_romd(&pfl->orig_mem, true); in pflash_mode_read_array()
195 return pfl->cfi_table[0x2c]; in pflash_regions_count()
200 * erasure based on CFI address 0x21 which is "Typical timeout per individual
210 return ((1ULL << pfl->cfi_table[0x21]) * pfl->sectors_to_erase) * SCALE_US; in pflash_erase_time()
218 return pfl->erase_time_remaining > 0; in pflash_erase_suspend_mode()
225 trace_pflash_timer_expired(pfl->name, pfl->cmd); in pflash_timer()
226 if (pfl->cmd == 0x30) { in pflash_timer()
233 if ((pfl->status & 0x08) == 0) { in pflash_timer()
236 timer_mod(&pfl->timer, in pflash_timer()
238 trace_pflash_erase_timeout(pfl->name, pfl->sectors_to_erase); in pflash_timer()
241 trace_pflash_erase_complete(pfl->name); in pflash_timer()
242 bitmap_zero(pfl->sector_erase_map, pfl->total_sectors); in pflash_timer()
243 pfl->sectors_to_erase = 0; in pflash_timer()
247 /* Reset flash */ in pflash_timer()
249 if (pfl->bypass) { in pflash_timer()
250 pfl->wcycle = 2; in pflash_timer()
251 pfl->cmd = 0; in pflash_timer()
258 * Read data from flash.
263 uint8_t *p = (uint8_t *)pfl->storage + offset; in pflash_data_read()
264 uint64_t ret = pfl->be ? ldn_be_p(p, width) : ldn_le_p(p, width); in pflash_data_read()
265 trace_pflash_data_read(pfl->name, offset, width, ret); in pflash_data_read()
280 assert(offset < pfl->chip_len); in pflash_sector_info()
284 uint64_t region_size = (uint64_t)pfl->nb_blocs[i] * pfl->sector_len[i]; in pflash_sector_info()
287 .len = pfl->sector_len[i], in pflash_sector_info()
288 .num = sector_num + (offset - addr) / pfl->sector_len[i], in pflash_sector_info()
291 sector_num += pfl->nb_blocs[i]; in pflash_sector_info()
298 * Returns true if the offset refers to a flash sector that is currently being
304 return test_bit(sector_num, pfl->sector_erase_map); in pflash_sector_is_erasing()
314 if (!pfl->rom_mode && pfl->wcycle == 0 && in pflash_read()
315 ++pfl->read_counter > PFLASH_LAZY_ROMD_THRESHOLD) { in pflash_read()
318 offset &= pfl->chip_len - 1; in pflash_read()
320 if (pfl->width == 2) { in pflash_read()
322 } else if (pfl->width == 4) { in pflash_read()
325 switch (pfl->cmd) { in pflash_read()
328 trace_pflash_read_unknown_state(pfl->name, pfl->cmd); in pflash_read()
339 ret = pfl->status; in pflash_read()
340 trace_pflash_read_status(pfl->name, ret); in pflash_read()
343 /* Flash area read */ in pflash_read()
346 case 0x90: /* flash ID read */ in pflash_read()
350 ret = boff & 0x01 ? pfl->ident1 : pfl->ident0; in pflash_read()
357 ret = boff & 0x01 ? pfl->ident3 : pfl->ident2; in pflash_read()
358 if (ret != (uint8_t)-1) { in pflash_read()
365 trace_pflash_read_done(pfl->name, boff, ret); in pflash_read()
376 ret = pfl->status; in pflash_read()
377 trace_pflash_read_status(pfl->name, ret); in pflash_read()
380 /* CFI query mode */ in pflash_read()
381 if (boff < sizeof(pfl->cfi_table)) { in pflash_read()
382 ret = pfl->cfi_table[boff]; in pflash_read()
388 trace_pflash_io_read(pfl->name, offset, width, ret, pfl->cmd, pfl->wcycle); in pflash_read()
393 /* update flash content on disk */
398 if (pfl->blk) { in pflash_update()
403 ret = blk_pwrite(pfl->blk, offset, offset_end - offset, in pflash_update()
404 pfl->storage + offset, 0); in pflash_update()
407 error_report("Could not update PFLASH: %s", strerror(-ret)); in pflash_update()
416 offset &= ~(sector_len - 1); in pflash_sector_erase()
417 trace_pflash_sector_erase_start(pfl->name, pfl->width * 2, offset, in pflash_sector_erase()
418 pfl->width * 2, offset + sector_len - 1); in pflash_sector_erase()
419 if (!pfl->ro) { in pflash_sector_erase()
420 uint8_t *p = pfl->storage; in pflash_sector_erase()
425 ++pfl->sectors_to_erase; in pflash_sector_erase()
426 set_bit(sector_info.num, pfl->sector_erase_map); in pflash_sector_erase()
428 timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 50000); in pflash_sector_erase()
439 trace_pflash_io_write(pfl->name, offset, width, value, pfl->wcycle); in pflash_write()
441 if (pfl->cmd != 0xA0) { in pflash_write()
443 if (cmd == 0xF0 && pfl->cmd != 0x10 && pfl->cmd != 0x30) { in pflash_write()
444 if (pfl->wcycle == WCYCLE_AUTOSELECT_CFI) { in pflash_write()
446 pfl->wcycle = 3; in pflash_write()
447 pfl->cmd = 0x90; in pflash_write()
453 offset &= pfl->chip_len - 1; in pflash_write()
456 if (pfl->width == 2) { in pflash_write()
458 } else if (pfl->width == 4) { in pflash_write()
461 /* Only the least-significant 11 bits are used in most cases. */ in pflash_write()
463 switch (pfl->wcycle) { in pflash_write()
466 if (pfl->rom_mode) { in pflash_write()
467 pfl->rom_mode = false; in pflash_write()
468 memory_region_rom_device_set_romd(&pfl->orig_mem, false); in pflash_write()
470 pfl->read_counter = 0; in pflash_write()
474 /* Enter CFI query mode */ in pflash_write()
475 pfl->wcycle = WCYCLE_CFI; in pflash_write()
476 pfl->cmd = 0x98; in pflash_write()
483 timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + in pflash_write()
484 pfl->erase_time_remaining); in pflash_write()
485 pfl->erase_time_remaining = 0; in pflash_write()
486 pfl->wcycle = 6; in pflash_write()
487 pfl->cmd = 0x30; in pflash_write()
498 if (boff != pfl->unlock_addr0 || cmd != 0xAA) { in pflash_write()
499 trace_pflash_unlock0_failed(pfl->name, boff, in pflash_write()
500 cmd, pfl->unlock_addr0); in pflash_write()
503 trace_pflash_write(pfl->name, "unlock sequence started"); in pflash_write()
508 if (boff != pfl->unlock_addr1 || cmd != 0x55) { in pflash_write()
509 trace_pflash_unlock1_failed(pfl->name, boff, cmd); in pflash_write()
512 trace_pflash_write(pfl->name, "unlock sequence done"); in pflash_write()
516 if (!pfl->bypass && boff != pfl->unlock_addr0) { in pflash_write()
517 trace_pflash_write_failed(pfl->name, boff, cmd); in pflash_write()
522 pfl->bypass = 1; in pflash_write()
527 pfl->cmd = cmd; in pflash_write()
528 trace_pflash_write_start(pfl->name, cmd); in pflash_write()
531 trace_pflash_write_unknown(pfl->name, cmd); in pflash_write()
536 switch (pfl->cmd) { in pflash_write()
544 if (pfl->bypass) { in pflash_write()
549 trace_pflash_data_write(pfl->name, offset, width, value); in pflash_write()
550 if (!pfl->ro) { in pflash_write()
551 p = (uint8_t *)pfl->storage + offset; in pflash_write()
552 if (pfl->be) { in pflash_write()
567 if (pfl->bypass) in pflash_write()
571 if (pfl->bypass && cmd == 0x00) { in pflash_write()
576 * We can enter CFI query mode from autoselect mode, but we must in pflash_write()
580 /* Enter autoselect CFI query mode */ in pflash_write()
581 pfl->wcycle = WCYCLE_AUTOSELECT_CFI; in pflash_write()
582 pfl->cmd = 0x98; in pflash_write()
587 trace_pflash_write_invalid(pfl->name, pfl->cmd); in pflash_write()
591 switch (pfl->cmd) { in pflash_write()
593 /* Ignore writes while flash data write is occurring */ in pflash_write()
600 trace_pflash_write_invalid_state(pfl->name, pfl->cmd, 5); in pflash_write()
611 if (boff != pfl->unlock_addr0) { in pflash_write()
612 trace_pflash_chip_erase_invalid(pfl->name, offset); in pflash_write()
616 trace_pflash_chip_erase_start(pfl->name); in pflash_write()
617 if (!pfl->ro) { in pflash_write()
618 memset(pfl->storage, 0xff, pfl->chip_len); in pflash_write()
619 pflash_update(pfl, 0, pfl->chip_len); in pflash_write()
622 /* Wait the time specified at CFI address 0x22. */ in pflash_write()
623 timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + in pflash_write()
624 (1ULL << pfl->cfi_table[0x22]) * SCALE_MS); in pflash_write()
630 trace_pflash_write_invalid_command(pfl->name, cmd); in pflash_write()
633 pfl->cmd = cmd; in pflash_write()
636 switch (pfl->cmd) { in pflash_write()
651 if ((pfl->status & 0x08) == 0) { in pflash_write()
652 pfl->erase_time_remaining = pflash_erase_time(pfl); in pflash_write()
654 int64_t delta = timer_expire_time_ns(&pfl->timer) - in pflash_write()
657 pfl->erase_time_remaining = delta <= 0 ? 1 : delta; in pflash_write()
660 timer_del(&pfl->timer); in pflash_write()
669 if ((pfl->status & 0x08) == 0) { in pflash_write()
680 trace_pflash_write_invalid_state(pfl->name, pfl->cmd, 6); in pflash_write()
684 /* Special values for CFI queries */ in pflash_write()
687 trace_pflash_write(pfl->name, "invalid write in CFI query mode"); in pflash_write()
691 trace_pflash_write(pfl->name, "invalid write state (wc 7)"); in pflash_write()
694 pfl->wcycle++; in pflash_write()
698 /* Reset flash */ in pflash_write()
700 pfl->bypass = 0; in pflash_write()
705 pfl->wcycle = 2; in pflash_write()
706 pfl->cmd = 0; in pflash_write()
719 /* Hardcoded CFI table (mostly from SG29 Spansion flash) */ in pflash_cfi02_fill_cfi_table()
722 pfl->cfi_table[0x10] = 'Q'; in pflash_cfi02_fill_cfi_table()
723 pfl->cfi_table[0x11] = 'R'; in pflash_cfi02_fill_cfi_table()
724 pfl->cfi_table[0x12] = 'Y'; in pflash_cfi02_fill_cfi_table()
726 pfl->cfi_table[0x13] = 0x02; in pflash_cfi02_fill_cfi_table()
727 pfl->cfi_table[0x14] = 0x00; in pflash_cfi02_fill_cfi_table()
729 pfl->cfi_table[0x15] = pri_ofs; in pflash_cfi02_fill_cfi_table()
730 pfl->cfi_table[0x16] = pri_ofs >> 8; in pflash_cfi02_fill_cfi_table()
732 pfl->cfi_table[0x17] = 0x00; in pflash_cfi02_fill_cfi_table()
733 pfl->cfi_table[0x18] = 0x00; in pflash_cfi02_fill_cfi_table()
735 pfl->cfi_table[0x19] = 0x00; in pflash_cfi02_fill_cfi_table()
736 pfl->cfi_table[0x1A] = 0x00; in pflash_cfi02_fill_cfi_table()
738 pfl->cfi_table[0x1B] = 0x27; in pflash_cfi02_fill_cfi_table()
740 pfl->cfi_table[0x1C] = 0x36; in pflash_cfi02_fill_cfi_table()
742 pfl->cfi_table[0x1D] = 0x00; in pflash_cfi02_fill_cfi_table()
744 pfl->cfi_table[0x1E] = 0x00; in pflash_cfi02_fill_cfi_table()
746 pfl->cfi_table[0x1F] = 0x07; in pflash_cfi02_fill_cfi_table()
748 pfl->cfi_table[0x20] = 0x00; in pflash_cfi02_fill_cfi_table()
750 pfl->cfi_table[0x21] = 0x09; in pflash_cfi02_fill_cfi_table()
752 pfl->cfi_table[0x22] = 0x0C; in pflash_cfi02_fill_cfi_table()
754 pfl->cfi_table[0x23] = 0x01; in pflash_cfi02_fill_cfi_table()
756 pfl->cfi_table[0x24] = 0x00; in pflash_cfi02_fill_cfi_table()
758 pfl->cfi_table[0x25] = 0x0A; in pflash_cfi02_fill_cfi_table()
760 pfl->cfi_table[0x26] = 0x0D; in pflash_cfi02_fill_cfi_table()
762 pfl->cfi_table[0x27] = ctz32(pfl->chip_len); in pflash_cfi02_fill_cfi_table()
763 /* Flash device interface (8 & 16 bits) */ in pflash_cfi02_fill_cfi_table()
764 pfl->cfi_table[0x28] = 0x02; in pflash_cfi02_fill_cfi_table()
765 pfl->cfi_table[0x29] = 0x00; in pflash_cfi02_fill_cfi_table()
766 /* Max number of bytes in multi-bytes write */ in pflash_cfi02_fill_cfi_table()
769 * pfl->cfi_table[0x2A] = 0x05; in pflash_cfi02_fill_cfi_table()
771 pfl->cfi_table[0x2A] = 0x00; in pflash_cfi02_fill_cfi_table()
772 pfl->cfi_table[0x2B] = 0x00; in pflash_cfi02_fill_cfi_table()
774 pfl->cfi_table[0x2c] = nb_regions; in pflash_cfi02_fill_cfi_table()
777 uint32_t sector_len_per_device = pfl->sector_len[i]; in pflash_cfi02_fill_cfi_table()
778 pfl->cfi_table[0x2d + 4 * i] = pfl->nb_blocs[i] - 1; in pflash_cfi02_fill_cfi_table()
779 pfl->cfi_table[0x2e + 4 * i] = (pfl->nb_blocs[i] - 1) >> 8; in pflash_cfi02_fill_cfi_table()
780 pfl->cfi_table[0x2f + 4 * i] = sector_len_per_device >> 8; in pflash_cfi02_fill_cfi_table()
781 pfl->cfi_table[0x30 + 4 * i] = sector_len_per_device >> 16; in pflash_cfi02_fill_cfi_table()
786 pfl->cfi_table[0x00 + pri_ofs] = 'P'; in pflash_cfi02_fill_cfi_table()
787 pfl->cfi_table[0x01 + pri_ofs] = 'R'; in pflash_cfi02_fill_cfi_table()
788 pfl->cfi_table[0x02 + pri_ofs] = 'I'; in pflash_cfi02_fill_cfi_table()
791 pfl->cfi_table[0x03 + pri_ofs] = '1'; in pflash_cfi02_fill_cfi_table()
792 pfl->cfi_table[0x04 + pri_ofs] = '0'; in pflash_cfi02_fill_cfi_table()
795 pfl->cfi_table[0x05 + pri_ofs] = 0x00; in pflash_cfi02_fill_cfi_table()
797 pfl->cfi_table[0x06 + pri_ofs] = 0x02; in pflash_cfi02_fill_cfi_table()
799 pfl->cfi_table[0x07 + pri_ofs] = 0x00; in pflash_cfi02_fill_cfi_table()
801 pfl->cfi_table[0x08 + pri_ofs] = 0x00; in pflash_cfi02_fill_cfi_table()
804 pfl->cfi_table[0x09 + pri_ofs] = 0x00; in pflash_cfi02_fill_cfi_table()
807 pfl->cfi_table[0x0a + pri_ofs] = 0x00; in pflash_cfi02_fill_cfi_table()
809 pfl->cfi_table[0x0b + pri_ofs] = 0x00; in pflash_cfi02_fill_cfi_table()
811 pfl->cfi_table[0x0c + pri_ofs] = 0x00; in pflash_cfi02_fill_cfi_table()
812 assert(0x0c + pri_ofs < ARRAY_SIZE(pfl->cfi_table)); in pflash_cfi02_fill_cfi_table()
821 if (pfl->uniform_sector_len == 0 && pfl->sector_len[0] == 0) { in pflash_cfi02_realize()
822 error_setg(errp, "attribute \"sector-length\" not specified or zero."); in pflash_cfi02_realize()
825 if (pfl->uniform_nb_blocs == 0 && pfl->nb_blocs[0] == 0) { in pflash_cfi02_realize()
826 error_setg(errp, "attribute \"num-blocks\" not specified or zero."); in pflash_cfi02_realize()
829 if (pfl->name == NULL) { in pflash_cfi02_realize()
835 pfl->chip_len = 0; in pflash_cfi02_realize()
836 pfl->total_sectors = 0; in pflash_cfi02_realize()
838 if (pfl->nb_blocs[nb_regions] == 0) { in pflash_cfi02_realize()
841 pfl->total_sectors += pfl->nb_blocs[nb_regions]; in pflash_cfi02_realize()
842 uint64_t sector_len_per_device = pfl->sector_len[nb_regions]; in pflash_cfi02_realize()
845 * The size of each flash sector must be a power of 2 and it must be in pflash_cfi02_realize()
857 if (pfl->chip_len & (sector_len_per_device - 1)) { in pflash_cfi02_realize()
859 "flash region %d not correctly aligned.", in pflash_cfi02_realize()
864 pfl->chip_len += (uint64_t)pfl->sector_len[nb_regions] * in pflash_cfi02_realize()
865 pfl->nb_blocs[nb_regions]; in pflash_cfi02_realize()
868 uint64_t uniform_len = (uint64_t)pfl->uniform_nb_blocs * in pflash_cfi02_realize()
869 pfl->uniform_sector_len; in pflash_cfi02_realize()
872 pfl->nb_blocs[0] = pfl->uniform_nb_blocs; in pflash_cfi02_realize()
873 pfl->sector_len[0] = pfl->uniform_sector_len; in pflash_cfi02_realize()
874 pfl->chip_len = uniform_len; in pflash_cfi02_realize()
875 pfl->total_sectors = pfl->uniform_nb_blocs; in pflash_cfi02_realize()
876 } else if (uniform_len != 0 && uniform_len != pfl->chip_len) { in pflash_cfi02_realize()
877 error_setg(errp, "\"num-blocks\"*\"sector-length\" " in pflash_cfi02_realize()
878 "different from \"num-blocks0\"*\'sector-length0\" + ... + " in pflash_cfi02_realize()
879 "\"num-blocks3\"*\"sector-length3\""); in pflash_cfi02_realize()
883 memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), in pflash_cfi02_realize()
884 &pflash_cfi02_ops, pfl, pfl->name, in pflash_cfi02_realize()
885 pfl->chip_len, errp); in pflash_cfi02_realize()
890 pfl->storage = memory_region_get_ram_ptr(&pfl->orig_mem); in pflash_cfi02_realize()
892 if (pfl->blk) { in pflash_cfi02_realize()
894 pfl->ro = !blk_supports_write_perm(pfl->blk); in pflash_cfi02_realize()
895 perm = BLK_PERM_CONSISTENT_READ | (pfl->ro ? 0 : BLK_PERM_WRITE); in pflash_cfi02_realize()
896 ret = blk_set_perm(pfl->blk, perm, BLK_PERM_ALL, errp); in pflash_cfi02_realize()
901 pfl->ro = 0; in pflash_cfi02_realize()
904 if (pfl->blk) { in pflash_cfi02_realize()
905 if (!blk_check_size_and_read_all(pfl->blk, dev, pfl->storage, in pflash_cfi02_realize()
906 pfl->chip_len, errp)) { in pflash_cfi02_realize()
907 vmstate_unregister_ram(&pfl->orig_mem, DEVICE(pfl)); in pflash_cfi02_realize()
913 pfl->unlock_addr0 &= 0x7FF; in pflash_cfi02_realize()
914 pfl->unlock_addr1 &= 0x7FF; in pflash_cfi02_realize()
917 pfl->sector_erase_map = bitmap_new(pfl->total_sectors); in pflash_cfi02_realize()
919 pfl->rom_mode = true; in pflash_cfi02_realize()
920 if (pfl->mappings > 1) { in pflash_cfi02_realize()
922 sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem); in pflash_cfi02_realize()
924 sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->orig_mem); in pflash_cfi02_realize()
927 timer_init_ns(&pfl->timer, QEMU_CLOCK_VIRTUAL, pflash_timer, pfl); in pflash_cfi02_realize()
928 pfl->status = 0; in pflash_cfi02_realize()
942 DEFINE_PROP_UINT32("num-blocks", PFlashCFI02, uniform_nb_blocs, 0),
943 DEFINE_PROP_UINT32("sector-length", PFlashCFI02, uniform_sector_len, 0),
944 DEFINE_PROP_UINT32("num-blocks0", PFlashCFI02, nb_blocs[0], 0),
945 DEFINE_PROP_UINT32("sector-length0", PFlashCFI02, sector_len[0], 0),
946 DEFINE_PROP_UINT32("num-blocks1", PFlashCFI02, nb_blocs[1], 0),
947 DEFINE_PROP_UINT32("sector-length1", PFlashCFI02, sector_len[1], 0),
948 DEFINE_PROP_UINT32("num-blocks2", PFlashCFI02, nb_blocs[2], 0),
949 DEFINE_PROP_UINT32("sector-length2", PFlashCFI02, sector_len[2], 0),
950 DEFINE_PROP_UINT32("num-blocks3", PFlashCFI02, nb_blocs[3], 0),
951 DEFINE_PROP_UINT32("sector-length3", PFlashCFI02, sector_len[3], 0),
954 DEFINE_PROP_UINT8("big-endian", PFlashCFI02, be, 0),
959 DEFINE_PROP_UINT16("unlock-addr0", PFlashCFI02, unlock_addr0, 0),
960 DEFINE_PROP_UINT16("unlock-addr1", PFlashCFI02, unlock_addr1, 0),
968 timer_del(&pfl->timer); in pflash_cfi02_unrealize()
969 g_free(pfl->sector_erase_map); in pflash_cfi02_unrealize()
976 dc->realize = pflash_cfi02_realize; in pflash_cfi02_class_init()
978 dc->unrealize = pflash_cfi02_unrealize; in pflash_cfi02_class_init()
980 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); in pflash_cfi02_class_init()
1015 qdev_prop_set_uint32(dev, "num-blocks", size / sector_len); in type_init()
1016 qdev_prop_set_uint32(dev, "sector-length", sector_len); in type_init()
1019 qdev_prop_set_uint8(dev, "big-endian", !!be); in type_init()
1024 qdev_prop_set_uint16(dev, "unlock-addr0", unlock_addr0); in type_init()
1025 qdev_prop_set_uint16(dev, "unlock-addr1", unlock_addr1); in type_init()