92     pl041_channel fifo1;  member
166     memset(&s->fifo1, 0x00, sizeof(s->fifo1));  in pl041_reset()
172     pl041_channel *channel = &s->fifo1;  in pl041_fifo1_write()
173     pl041_fifo *fifo = &s->fifo1.tx_fifo;  in pl041_fifo1_write()
201             DBG_L1("fifo1 write: overrun\n");  in pl041_fifo1_write()
232             DBG_L1("fifo1 write: overrun\n");  in pl041_fifo1_write()
255     pl041_channel *channel = &s->fifo1;  in pl041_fifo1_transmit()
256     pl041_fifo *fifo = &s->fifo1.tx_fifo;  in pl041_fifo1_transmit()
260     /* Check if FIFO1 transmit is enabled */  in pl041_fifo1_transmit()
397         pl041_channel *channel = &s->fifo1;  in pl041_write()
620         VMSTATE_STRUCT(fifo1, PL041State, 0,