Lines Matching +full:0 +full:x1e740000
26 #define ASPEED_SOC_IOMEM_SIZE 0x00200000
29 [ASPEED_DEV_SPI_BOOT] = 0x00000000,
30 [ASPEED_DEV_IOMEM] = 0x1E600000,
31 [ASPEED_DEV_FMC] = 0x1E620000,
32 [ASPEED_DEV_SPI1] = 0x1E630000,
33 [ASPEED_DEV_EHCI1] = 0x1E6A1000,
34 [ASPEED_DEV_UHCI] = 0x1E6B0000,
35 [ASPEED_DEV_VIC] = 0x1E6C0000,
36 [ASPEED_DEV_SDMC] = 0x1E6E0000,
37 [ASPEED_DEV_SCU] = 0x1E6E2000,
38 [ASPEED_DEV_HACE] = 0x1E6E3000,
39 [ASPEED_DEV_GFX] = 0x1E6E6000,
40 [ASPEED_DEV_XDMA] = 0x1E6E7000,
41 [ASPEED_DEV_VIDEO] = 0x1E700000,
42 [ASPEED_DEV_ADC] = 0x1E6E9000,
43 [ASPEED_DEV_SRAM] = 0x1E720000,
44 [ASPEED_DEV_SDHCI] = 0x1E740000,
45 [ASPEED_DEV_GPIO] = 0x1E780000,
46 [ASPEED_DEV_RTC] = 0x1E781000,
47 [ASPEED_DEV_TIMER1] = 0x1E782000,
48 [ASPEED_DEV_WDT] = 0x1E785000,
49 [ASPEED_DEV_PWM] = 0x1E786000,
50 [ASPEED_DEV_LPC] = 0x1E789000,
51 [ASPEED_DEV_IBT] = 0x1E789140,
52 [ASPEED_DEV_I2C] = 0x1E78A000,
53 [ASPEED_DEV_PECI] = 0x1E78B000,
54 [ASPEED_DEV_ETH1] = 0x1E660000,
55 [ASPEED_DEV_ETH2] = 0x1E680000,
56 [ASPEED_DEV_UART1] = 0x1E783000,
57 [ASPEED_DEV_UART2] = 0x1E78D000,
58 [ASPEED_DEV_UART3] = 0x1E78E000,
59 [ASPEED_DEV_UART4] = 0x1E78F000,
60 [ASPEED_DEV_UART5] = 0x1E784000,
61 [ASPEED_DEV_VUART] = 0x1E787000,
62 [ASPEED_DEV_SDRAM] = 0x40000000,
66 [ASPEED_DEV_SPI_BOOT] = 0x00000000,
67 [ASPEED_DEV_IOMEM] = 0x1E600000,
68 [ASPEED_DEV_FMC] = 0x1E620000,
69 [ASPEED_DEV_SPI1] = 0x1E630000,
70 [ASPEED_DEV_SPI2] = 0x1E631000,
71 [ASPEED_DEV_EHCI1] = 0x1E6A1000,
72 [ASPEED_DEV_EHCI2] = 0x1E6A3000,
73 [ASPEED_DEV_UHCI] = 0x1E6B0000,
74 [ASPEED_DEV_VIC] = 0x1E6C0000,
75 [ASPEED_DEV_SDMC] = 0x1E6E0000,
76 [ASPEED_DEV_SCU] = 0x1E6E2000,
77 [ASPEED_DEV_HACE] = 0x1E6E3000,
78 [ASPEED_DEV_GFX] = 0x1E6E6000,
79 [ASPEED_DEV_XDMA] = 0x1E6E7000,
80 [ASPEED_DEV_ADC] = 0x1E6E9000,
81 [ASPEED_DEV_VIDEO] = 0x1E700000,
82 [ASPEED_DEV_SRAM] = 0x1E720000,
83 [ASPEED_DEV_SDHCI] = 0x1E740000,
84 [ASPEED_DEV_GPIO] = 0x1E780000,
85 [ASPEED_DEV_RTC] = 0x1E781000,
86 [ASPEED_DEV_TIMER1] = 0x1E782000,
87 [ASPEED_DEV_WDT] = 0x1E785000,
88 [ASPEED_DEV_PWM] = 0x1E786000,
89 [ASPEED_DEV_LPC] = 0x1E789000,
90 [ASPEED_DEV_IBT] = 0x1E789140,
91 [ASPEED_DEV_I2C] = 0x1E78A000,
92 [ASPEED_DEV_PECI] = 0x1E78B000,
93 [ASPEED_DEV_ETH1] = 0x1E660000,
94 [ASPEED_DEV_ETH2] = 0x1E680000,
95 [ASPEED_DEV_UART1] = 0x1E783000,
96 [ASPEED_DEV_UART2] = 0x1E78D000,
97 [ASPEED_DEV_UART3] = 0x1E78E000,
98 [ASPEED_DEV_UART4] = 0x1E78F000,
99 [ASPEED_DEV_UART5] = 0x1E784000,
100 [ASPEED_DEV_VUART] = 0x1E787000,
101 [ASPEED_DEV_SDRAM] = 0x80000000,
115 [ASPEED_DEV_SDMC] = 0,
164 for (i = 0; i < sc->num_cpus; i++) { in aspeed_ast2400_soc_init()
187 for (i = 0; i < sc->wdts_num; i++) { in aspeed_ast2400_soc_init()
203 for (i = 0; i < sc->spis_num; i++) { in aspeed_ast2400_soc_init()
208 for (i = 0; i < sc->ehcis_num; i++) { in aspeed_ast2400_soc_init()
220 for (i = 0; i < sc->macs_num; i++) { in aspeed_ast2400_soc_init()
225 for (i = 0; i < sc->uarts_num; i++) { in aspeed_ast2400_soc_init()
241 for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { in aspeed_ast2400_soc_init()
271 "aspeed.spi_boot_container", 0x10000000); in aspeed_ast2400_soc_realize()
282 sc->memmap[ASPEED_DEV_VIDEO], 0x1000); in aspeed_ast2400_soc_realize()
285 for (i = 0; i < sc->num_cpus; i++) { in aspeed_ast2400_soc_realize()
294 sram_name = g_strdup_printf("aspeed.sram.%d", CPU(&a->cpu[0])->cpu_index); in aspeed_ast2400_soc_realize()
306 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]); in aspeed_ast2400_soc_realize()
312 aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->vic), 0, sc->memmap[ASPEED_DEV_VIC]); in aspeed_ast2400_soc_realize()
313 sysbus_connect_irq(SYS_BUS_DEVICE(&a->vic), 0, in aspeed_ast2400_soc_realize()
322 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]); in aspeed_ast2400_soc_realize()
323 sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, in aspeed_ast2400_soc_realize()
332 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->timerctrl), 0, in aspeed_ast2400_soc_realize()
334 for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) { in aspeed_ast2400_soc_realize()
340 for (i = 0; i < sc->wdts_num; i++) { in aspeed_ast2400_soc_realize()
348 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->wdt[i]), 0, in aspeed_ast2400_soc_realize()
356 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]); in aspeed_ast2400_soc_realize()
357 sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0, in aspeed_ast2400_soc_realize()
371 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]); in aspeed_ast2400_soc_realize()
372 sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c), 0, in aspeed_ast2400_soc_realize()
379 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->peci), 0, in aspeed_ast2400_soc_realize()
381 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peci), 0, in aspeed_ast2400_soc_realize()
390 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]); in aspeed_ast2400_soc_realize()
393 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0, in aspeed_ast2400_soc_realize()
397 MemoryRegion *fmc0_mmio = &s->fmc.flashes[0].mmio; in aspeed_ast2400_soc_realize()
399 fmc0_mmio, 0, memory_region_size(fmc0_mmio)); in aspeed_ast2400_soc_realize()
400 memory_region_add_subregion(&s->spi_boot_container, 0x0, &s->spi_boot); in aspeed_ast2400_soc_realize()
403 for (i = 0; i < sc->spis_num; i++) { in aspeed_ast2400_soc_realize()
407 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->spi[i]), 0, in aspeed_ast2400_soc_realize()
414 for (i = 0; i < sc->ehcis_num; i++) { in aspeed_ast2400_soc_realize()
418 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->ehci[i]), 0, in aspeed_ast2400_soc_realize()
420 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, in aspeed_ast2400_soc_realize()
428 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->uhci), 0, in aspeed_ast2400_soc_realize()
430 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uhci), 0, in aspeed_ast2400_soc_realize()
437 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdmc), 0, in aspeed_ast2400_soc_realize()
446 for (i = 0; i < sc->macs_num; i++) { in aspeed_ast2400_soc_realize()
452 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, in aspeed_ast2400_soc_realize()
454 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0, in aspeed_ast2400_soc_realize()
462 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->xdma), 0, in aspeed_ast2400_soc_realize()
464 sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0, in aspeed_ast2400_soc_realize()
471 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gpio), 0, in aspeed_ast2400_soc_realize()
473 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, in aspeed_ast2400_soc_realize()
480 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sdhci), 0, in aspeed_ast2400_soc_realize()
482 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, in aspeed_ast2400_soc_realize()
489 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->lpc), 0, sc->memmap[ASPEED_DEV_LPC]); in aspeed_ast2400_soc_realize()
492 sysbus_connect_irq(SYS_BUS_DEVICE(&s->lpc), 0, in aspeed_ast2400_soc_realize()
502 * to the VIC is at offset 0. in aspeed_ast2400_soc_realize()
532 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->hace), 0, in aspeed_ast2400_soc_realize()
534 sysbus_connect_irq(SYS_BUS_DEVICE(&s->hace), 0, in aspeed_ast2400_soc_realize()
541 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->gfx), 0, sc->memmap[ASPEED_DEV_GFX]); in aspeed_ast2400_soc_realize()
542 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gfx), 0, in aspeed_ast2400_soc_realize()
549 aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->pwm), 0, sc->memmap[ASPEED_DEV_PWM]); in aspeed_ast2400_soc_realize()
550 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pwm), 0, in aspeed_ast2400_soc_realize()
570 sc->sram_size = 0x8000; in aspeed_soc_ast2400_class_init()
599 sc->sram_size = 0x9000; in aspeed_soc_ast2500_class_init()