Lines Matching +full:0 +full:xe000e000
34 return s->base | (offset & 0x1ffffff) >> 5; in bitband_addr()
107 "bitband", 0x02000000); in bitband_init()
126 0x20000000, 0x40000000
130 0x22000000, 0x42000000
141 attrs.secure = 0; in v7m_sysreg_ns_write()
161 attrs.secure = 0; in v7m_sysreg_ns_read()
169 *data = 0; in v7m_sysreg_ns_read()
188 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]), 0); in v7m_systick_write()
201 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systick[attrs.secure]), 0); in v7m_systick_read()
220 qemu_log_mask(LOG_UNIMP, "Read of unassigned area of PPB: offset 0x%x\n", in ppb_default_read()
225 *data = 0; in ppb_default_read()
233 qemu_log_mask(LOG_UNIMP, "Write of unassigned area of PPB: offset 0x%x\n", in ppb_default_write()
271 for (i = 0; i < ARRAY_SIZE(s->bitband); i++) { in armv7m_instance_init()
276 s->refclk = qdev_init_clock_in(DEVICE(obj), "refclk", NULL, NULL, 0); in armv7m_instance_init()
277 s->cpuclk = qdev_init_clock_in(DEVICE(obj), "cpuclk", NULL, NULL, 0); in armv7m_instance_init()
298 memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1); in armv7m_realize()
384 * "System PPB" space. This is the range from 0xe0000000 to 0xe00fffff in armv7m_realize()
390 * (for instance the Data Watchpoint and Trace unit at 0xe0001000) in armv7m_realize()
394 * The NVIC and System Control Space (SCS) starts at 0xe000e000 in armv7m_realize()
396 * 0x004 - ICTR in armv7m_realize()
397 * 0x010 - 0xff - systick in armv7m_realize()
398 * 0x100..0x7ec - NVIC in armv7m_realize()
399 * 0x7f0..0xcff - Reserved in armv7m_realize()
400 * 0xd00..0xd3c - SCS registers in armv7m_realize()
401 * 0xd40..0xeff - Reserved or Not implemented in armv7m_realize()
402 * 0xf00 - STIR in armv7m_realize()
405 * In v8M there is a second range 0xe002e000..0xe002efff which is the in armv7m_realize()
421 * - system register regions (provided by the NVIC) : 0 in armv7m_realize()
428 "nvic-default", 0x100000); in armv7m_realize()
429 memory_region_add_subregion_overlap(&s->container, 0xe0000000, in armv7m_realize()
434 sysbus_connect_irq(sbd, 0, in armv7m_realize()
437 memory_region_add_subregion(&s->container, 0xe000e000, in armv7m_realize()
438 sysbus_mmio_get_region(sbd, 0)); in armv7m_realize()
443 sysbus_mmio_get_region(sbd, 0), in armv7m_realize()
444 "nvic_sysregs_ns", 0x1000); in armv7m_realize()
445 memory_region_add_subregion(&s->container, 0xe002e000, in armv7m_realize()
465 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systick[M_REG_NS]), 0, in armv7m_realize()
487 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systick[M_REG_S]), 0, in armv7m_realize()
494 "v7m_systick", 0xe0); in armv7m_realize()
496 memory_region_add_subregion_overlap(&s->container, 0xe000e010, in armv7m_realize()
501 "v7m_systick_ns", 0xe0); in armv7m_realize()
502 memory_region_add_subregion_overlap(&s->container, 0xe002e010, in armv7m_realize()
514 memory_region_add_subregion_overlap(&s->container, 0xe0005000, in armv7m_realize()
515 sysbus_mmio_get_region(sbd, 0), 1); in armv7m_realize()
518 for (i = 0; i < ARRAY_SIZE(s->bitband); i++) { in armv7m_realize()
534 sysbus_mmio_get_region(sbd, 0)); in armv7m_realize()
546 DEFINE_PROP_UINT32("init-svtor", ARMv7MState, init_svtor, 0),
547 DEFINE_PROP_UINT32("init-nsvtor", ARMv7MState, init_nsvtor, 0),
612 NULL, 0, EM_ARM, 1, 0, as); in armv7m_load_kernel()
613 if (image_size < 0) { in armv7m_load_kernel()
617 if (image_size < 0) { in armv7m_load_kernel()
635 DEFINE_PROP_UINT32("base", BitBandState, base, 0),