Lines Matching +full:- +full:- +full:disable +full:- +full:system

10 Cortex-A15 and the Cortex-A57, which respectively implement Arm
11 architecture reference manuals ARMv7-A and ARMv8-A, may both optionally
12 implement PMUs. For example, if a user wants to use a Cortex-A15 without
13 a PMU, then the ``-cpu`` parameter should contain ``pmu=off`` on the QEMU
14 command line, i.e. ``-cpu cortex-a15,pmu=off``.
18 that implement the ARMv8-A architecture reference manual may optionally
20 ``aarch64`` CPU property. A CPU type such as the Cortex-A15, which does
21 not implement ARMv8-A, will not have the ``aarch64`` CPU property.
30 prefixed with "kvm-" and are described in "KVM VCPU Features".
36 CPU type is possible with the ``query-cpu-model-expansion`` QMP command.
37 Below are some examples where ``scripts/qmp/qmp-shell`` (see the top comment
41 (Note, we started QEMU with qemu-system-aarch64, so ``max`` is
42 implementing the ARMv8-A reference manual in this case)::
44 (QEMU) query-cpu-model-expansion type=full model={"name":"max"}
62 (2) Let's try to disable the PMU::
64 (QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"pmu":false}}
76 (3) Let's try to disable ``aarch64``, which enables the AArch32 CPU feature::
78 (QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"aarch64":false}}
81 "'aarch64' feature cannot be disabled unless KVM is enabled and 32-bit EL1 is supported"
87 (4) Let's disable ``sve`` and see what happens to all the optional SVE
90 (QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"sve":false}}
102 (5) Let's try probing CPU features for the Cortex-A15 CPU type::
104 (QEMU) query-cpu-model-expansion type=full model={"name":"cortex-a15"}
105 {"return": {"model": {"name": "cortex-a15", "props": {"pmu": true}}}}
110 -------------------------------------
123 -------------------------------
126 that do work, e.g. using the named CPU model ``cortex-a57`` with KVM on a
135 Enabling KVM also affects the ``query-cpu-model-expansion`` QMP command. The
142 above, the ``cortex-a57`` CPU type is also valid when KVM is enabled.
144 then attempt to query ``cortex-a57``, however that query will fail with our
147 some time. Additionally, if the KVM-enabled QEMU instance running on a
148 seattle host is using the ``cortex-a57`` CPU type, then querying ``cortex-a57``
158 $ qemu-system-aarch64 -M virt -cpu max,pmu=off,sve=on,sve128=on,sve256=on
164 defaults, it would seem we need to disable many SVE vector lengths, rather
176 are named with the prefix "kvm-". KVM VCPU features may be probed,
180 ``kvm-no-adjvtime``
181 By default kvm-no-adjvtime is disabled. This means that by default
194 Enable kvm-no-adjvtime to disable virtual time adjustment, also
195 restoring the legacy (pre-5.0) behavior.
197 ``kvm-steal-time``
198 Since v5.2, kvm-steal-time is enabled by default when KVM is
199 enabled, the feature is supported, and the guest is 64-bit.
201 When kvm-steal-time is enabled a 64-bit guest can account for time
214 Enable or disable ``FEAT_Pauth`` entirely.
216 ``pauth-impdef``
219 ``pauth-qarma3``
222 Without either ``pauth-impdef`` or ``pauth-qarma3`` enabled,
226 non-cryptographic but significantly faster.
232 is used to enable or disable the entire SVE feature, just as the ``pmu``
234 is used to enable or disable specific vector lengths, where ``N`` is the
244 ---------------------------------------------
250 KVM is not enabled, then only all the smaller, power-of-two vector
252 vector lengths up to 512-bits (128, 256, 384, 512), then if ``sve512``
253 is enabled, the 128-bit vector length, 256-bit vector length, and
254 384-bit vector length must also be enabled. Without KVM, the 384-bit
262 ----------------------------------
275 KVM is not in use means including the non-power-of-two lengths, and,
280 disable the last enabled vector length (see constraint (1) of "SVE
300 When KVM is not enabled, disabling a power-of-two vector length also
301 disables all vector lengths larger than the power-of-two length.
309 Dependencies and Constraints", which will even be auto-enabled if
319 -------------------------
321 1) Disable SVE::
323 $ qemu-system-aarch64 -M virt -cpu max,sve=off
327 $ qemu-system-aarch64 -M virt -cpu max
332 $ qemu-system-aarch64 -M virt,accel=kvm -cpu host
334 4) Only enable the 128-bit vector length::
336 $ qemu-system-aarch64 -M virt -cpu max,sve128=on
338 5) Disable the 512-bit vector length and all larger vector lengths,
339 since 512 is a power-of-two. This results in all the smaller,
342 $ qemu-system-aarch64 -M virt -cpu max,sve512=off
344 6) Enable the 128-bit, 256-bit, and 512-bit vector lengths::
346 $ qemu-system-aarch64 -M virt -cpu max,sve128=on,sve256=on,sve512=on
348 7) The same as (6), but since the 128-bit and 256-bit vector
349 lengths are required for the 512-bit vector length to be enabled,
350 then allow them to be auto-enabled::
352 $ qemu-system-aarch64 -M virt -cpu max,sve512=on
354 8) Do the same as (7), but by first disabling SVE and then re-enabling it::
356 $ qemu-system-aarch64 -M virt -cpu max,sve=off,sve512=on,sve=on
360 $ qemu-system-aarch64 -M virt -cpu max,sve128=off
361 $ qemu-system-aarch64 -M virt -cpu max,sve=off,sve128=off,sve=on
364 --------------------------------
373 -------------------------
375 1) Disable SME::
377 $ qemu-system-aarch64 -M virt -cpu max,sme=off
381 $ qemu-system-aarch64 -M virt -cpu max
383 3) Only enable the 256-bit vector length::
385 $ qemu-system-aarch64 -M virt -cpu max,sme256=on
387 3) Enable the 256-bit and 1024-bit vector lengths::
389 $ qemu-system-aarch64 -M virt -cpu max,sme256=on,sme1024=on
391 4) Disable the 512-bit vector length. This results in all the other
395 $ qemu-system-aarch64 -M virt -cpu max,sve512=off
397 SVE User-mode Default Vector Length Property
398 --------------------------------------------
400 For qemu-aarch64, the cpu property ``sve-default-vector-length=N`` is
410 If this property is set to ``-1`` then the default vector length
417 used to enable or disable the entire SME feature, and ``sme<N>`` is
418 used to enable or disable specific vector lengths. Finally,
419 ``sme_fa64`` is used to enable or disable ``FEAT_SME_FA64``, which
430 SME User-mode Default Vector Length Property
431 --------------------------------------------
433 For qemu-aarch64, the cpu property ``sme-default-vector-length=N`` is
439 As with ``sve-default-vector-length``, if the default length is larger
441 be reduced. If this property is set to ``-1`` then the default vector
449 The feature is enabled by the CPU property ``x-rme``, with the ``x-``
456 -----------------------------
459 configurations, ``x-l0gptsz=S`` may be used to specify the value
460 to encode into ``GPCCR_EL3.L0GPTSZ``, a read-only field that
464 As with ``x-rme``, the ``x-l0gptsz`` property may be renamed or