qemu/docs/bypass-iommu.txt

1 BYPASS IOMMU PROPERTY
6 Traditionally, there is a global switch to enable/disable vIOMMU. All
8 is not flexible. We introduce this bypass iommu property to support
10 passthrough devices with no-iommu mode and devices go through vIOMMU in
14 determine whether the devices attached on the PCI host bridge will bypass
17 bypass vIOMMU. When bypass_iommu property is not set for a host bridge,
22 The bypass iommu feature support PXB host bridge and default main host
26 on AArch64. Other machine types do not support bypass iommu for default
29 1. The following is the bypass iommu options:
31      qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true
33      qemu -machine virt,iommu=smmuv3,default_bus_bypass_iommu=true
34  (3) X86 default root bus bypass iommu:
35      qemu -machine q35,default_bus_bypass_iommu=true
40 qemu-system-aarch64 \
41  -machine virt,kernel_irqchip=on,iommu=smmuv3,default_bus_bypass_iommu=true \
42  -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3.0x1 \
43  -device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x3.0x2,bypass_iommu=true \
46  - a default host bridge which bypass SMMUv3
47  - a pxb host bridge which go through SMMUv3
48  - a pxb host bridge which bypass SMMUv3
53 qemu-system-x86_64 \
54  -machine q35,accel=kvm,default_bus_bypass_iommu=true \
55  -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3 \
56  -device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x4,bypass_iommu=true \
57  -device intel-iommu \
60  - a default host bridge which bypass iommu
61  - a pxb host bridge which go through iommu
62  - a pxb host bridge which bypass iommu
66 There might be potential security risk when devices bypass iommu, because
68 iommu isolation. So it would be necessary to only bypass iommu for trusted
73 The bypass iommu feature includes:
74  - Address space
75    Add bypass iommu property check of PCI Host and do not get iommu address
76    space for devices bypass iommu.
77  - Arm SMMUv3 support
79    RID mapping for devices which do not bypass iommu.
80  - X86 IOMMU support
82    of devices which do not bypass iommu, then fill the DMAR drhd struct with
83    explicit device scope info. To support AMD iommu, add check of bypass iommu
85  - Machine and PXB options
86    We add bypass iommu options in machine option for default root bus, and add
87    option for PXB also. Note that the default value of bypass iommu is false,