qemu/disas/m68k.c

179 #define cpu32	 0x100		/* e.g., 68332 */  macro
205 #define	m68010up   (m68010 | cpu32 | m68020up)
2176 {"bhil", 2,	one(0061377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2177 {"blsl", 2,	one(0061777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2178 {"bccl", 2,	one(0062377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2179 {"bcsl", 2,	one(0062777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2180 {"bnel", 2,	one(0063377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2181 {"beql", 2,	one(0063777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2182 {"bvcl", 2,	one(0064377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2183 {"bvsl", 2,	one(0064777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2184 {"bpll", 2,	one(0065377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2185 {"bmil", 2,	one(0065777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2186 {"bgel", 2,	one(0066377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2187 {"bltl", 2,	one(0066777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2188 {"bgtl", 2,	one(0067377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2189 {"blel", 2,	one(0067777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2238 {"bgnd", 2,	one(0045372),	one(0177777), "", cpu32 },
2245 {"bral", 2,	one(0060377),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2254 {"bsrl", 2,	one(0060777),	one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2274 {"chk2b", 4, 	two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
2275 {"chk2w", 4, 	two(0001300,0004000),	two(0177700,07777), "!sR1", m68020up | cpu32 },
2276 {"chk2l", 4, 	two(0002300,0004000),	two(0177700,07777), "!sR1", m68020up | cpu32 },
2301 {"cmp2b", 4,	two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
2302 {"cmp2w", 4,	two(0001300,0),	two(0177700,07777), "!sR1", m68020up | cpu32 },
2303 {"cmp2l", 4,	two(0002300,0),	two(0177700,07777), "!sR1", m68020up | cpu32 },
2355 {"divsl", 4, 	two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
2356 {"divsl", 4, 	two(0046100,0004000),two(0177700,0107770),";lDD",   m68020up|cpu32 },
2359 {"divsll", 4, 	two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
2360 {"divsll", 4, 	two(0046100,0004000),two(0177700,0107770),";lDD",  m68020up|cpu32 },
2364 {"divul", 4,	two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
2365 {"divul", 4,	two(0046100,0000000),two(0177700,0107770),";lDD",   m68020up|cpu32 },
2368 {"divull", 4,	two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
2369 {"divull", 4,	two(0046100,0000000),two(0177700,0107770),";lDD",  m68020up|cpu32 },
2403 {"extbl", 2,	one(0044700),	one(0177770), "Ds", m68020up|cpu32|mcfisa_a },
3481 {"lpstop", 6,	two(0174000,0000700),two(0177777,0177777),"#w", cpu32|m68060 },
3484 {"linkl", 6,	one(0044010),	one(0177770), "As#l", m68020up | cpu32 },
3486 {"link", 6,	one(0044010),	one(0177770), "As#l", m68020up | cpu32 },
3716 {"mulsl", 4,	two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
3718 {"mulsl", 4,	two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
3721 {"mulul", 4,	two(0046000,000000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
3723 {"mulul", 4,	two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
4130      two(0177700,0107777), "!sD1", cpu32 },				\
4132      two(0177770,0107770), "DsD3D1", cpu32 }
4142 {"trapcc", 2,	one(0052374),	one(0177777), "", m68020up | cpu32 },
4143 {"trapcs", 2,	one(0052774),	one(0177777), "", m68020up | cpu32 },
4144 {"trapeq", 2,	one(0053774),	one(0177777), "", m68020up | cpu32 },
4145 {"trapf", 2,	one(0050774),	one(0177777), "", m68020up | cpu32 | mcfisa_a },
4146 {"trapge", 2,	one(0056374),	one(0177777), "", m68020up | cpu32 },
4147 {"trapgt", 2,	one(0057374),	one(0177777), "", m68020up | cpu32 },
4148 {"traphi", 2,	one(0051374),	one(0177777), "", m68020up | cpu32 },
4149 {"traple", 2,	one(0057774),	one(0177777), "", m68020up | cpu32 },
4150 {"trapls", 2,	one(0051774),	one(0177777), "", m68020up | cpu32 },
4151 {"traplt", 2,	one(0056774),	one(0177777), "", m68020up | cpu32 },
4152 {"trapmi", 2,	one(0055774),	one(0177777), "", m68020up | cpu32 },
4153 {"trapne", 2,	one(0053374),	one(0177777), "", m68020up | cpu32 },
4154 {"trappl", 2,	one(0055374),	one(0177777), "", m68020up | cpu32 },
4155 {"trapt", 2,	one(0050374),	one(0177777), "", m68020up | cpu32 },
4156 {"trapvc", 2,	one(0054374),	one(0177777), "", m68020up | cpu32 },
4157 {"trapvs", 2,	one(0054774),	one(0177777), "", m68020up | cpu32 },
4159 {"trapccw", 4,	one(0052372),	one(0177777), "#w", m68020up|cpu32 },
4160 {"trapcsw", 4,	one(0052772),	one(0177777), "#w", m68020up|cpu32 },
4161 {"trapeqw", 4,	one(0053772),	one(0177777), "#w", m68020up|cpu32 },
4162 {"trapfw", 4,	one(0050772),	one(0177777), "#w", m68020up|cpu32|mcfisa_a},
4163 {"trapgew", 4,	one(0056372),	one(0177777), "#w", m68020up|cpu32 },
4164 {"trapgtw", 4,	one(0057372),	one(0177777), "#w", m68020up|cpu32 },
4165 {"traphiw", 4,	one(0051372),	one(0177777), "#w", m68020up|cpu32 },
4166 {"traplew", 4,	one(0057772),	one(0177777), "#w", m68020up|cpu32 },
4167 {"traplsw", 4,	one(0051772),	one(0177777), "#w", m68020up|cpu32 },
4168 {"trapltw", 4,	one(0056772),	one(0177777), "#w", m68020up|cpu32 },
4169 {"trapmiw", 4,	one(0055772),	one(0177777), "#w", m68020up|cpu32 },
4170 {"trapnew", 4,	one(0053372),	one(0177777), "#w", m68020up|cpu32 },
4171 {"trapplw", 4,	one(0055372),	one(0177777), "#w", m68020up|cpu32 },
4172 {"traptw", 4,	one(0050372),	one(0177777), "#w", m68020up|cpu32 },
4173 {"trapvcw", 4,	one(0054372),	one(0177777), "#w", m68020up|cpu32 },
4174 {"trapvsw", 4,	one(0054772),	one(0177777), "#w", m68020up|cpu32 },
4176 {"trapccl", 6,	one(0052373),	one(0177777), "#l", m68020up|cpu32 },
4177 {"trapcsl", 6,	one(0052773),	one(0177777), "#l", m68020up|cpu32 },
4178 {"trapeql", 6,	one(0053773),	one(0177777), "#l", m68020up|cpu32 },
4179 {"trapfl", 6,	one(0050773),	one(0177777), "#l", m68020up|cpu32|mcfisa_a},
4180 {"trapgel", 6,	one(0056373),	one(0177777), "#l", m68020up|cpu32 },
4181 {"trapgtl", 6,	one(0057373),	one(0177777), "#l", m68020up|cpu32 },
4182 {"traphil", 6,	one(0051373),	one(0177777), "#l", m68020up|cpu32 },
4183 {"traplel", 6,	one(0057773),	one(0177777), "#l", m68020up|cpu32 },
4184 {"traplsl", 6,	one(0051773),	one(0177777), "#l", m68020up|cpu32 },
4185 {"trapltl", 6,	one(0056773),	one(0177777), "#l", m68020up|cpu32 },
4186 {"trapmil", 6,	one(0055773),	one(0177777), "#l", m68020up|cpu32 },
4187 {"trapnel", 6,	one(0053373),	one(0177777), "#l", m68020up|cpu32 },
4188 {"trappll", 6,	one(0055373),	one(0177777), "#l", m68020up|cpu32 },
4189 {"traptl", 6,	one(0050373),	one(0177777), "#l", m68020up|cpu32 },
4190 {"trapvcl", 6,	one(0054373),	one(0177777), "#l", m68020up|cpu32 },
4191 {"trapvsl", 6,	one(0054773),	one(0177777), "#l", m68020up|cpu32 },
4195 {"tstb", 2,	one(0045000),	one(0177700), ";b", m68020up|cpu32|mcfisa_a },
4197 {"tstw", 2,	one(0045100),	one(0177700), "*w", m68020up|cpu32|mcfisa_a },
4199 {"tstl", 2,	one(0045200),	one(0177700), "*l", m68020up|cpu32|mcfisa_a },