Lines Matching full:cycles
281 "BriefDescription": "Reference cycles when the thread is unhalted (counts at 100 MHz rate)",
290 …"BriefDescription": "Reference cycles when the at least one thread on the physical core is unhalte…
293 …"PublicDescription": "Reference cycles when the at least one thread on the physical core is unhalt…
305 "BriefDescription": "Reference cycles when the core is not in halt state.",
307 …"PublicDescription": "This event counts the number of reference cycles when the core is not in a h…
312 "BriefDescription": "Reference cycles when the thread is unhalted (counts at 100 MHz rate)",
315 … "PublicDescription": "Reference cycles when the thread is unhalted. (counts at 100 MHz rate)",
321 …"BriefDescription": "Reference cycles when the at least one thread on the physical core is unhalte…
324 …"PublicDescription": "Reference cycles when the at least one thread on the physical core is unhalt…
329 "BriefDescription": "Core cycles when the thread is not in halt state.",
331 …"PublicDescription": "This event counts the number of thread cycles while the thread is not in a h…
337 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
343 "BriefDescription": "Thread cycles when thread is not in halt state",
346 …"PublicDescription": "Counts the number of thread cycles while the thread is not in a halt state. …
351 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
357 "BriefDescription": "Cycles with pending L1 cache miss loads.",
361 … "PublicDescription": "Cycles with pending L1 data cache miss loads. Set Cmask=8 to count cycle.",
366 "BriefDescription": "Cycles with pending L2 cache miss loads.",
371 "PublicDescription": "Cycles with pending L2 miss loads. Set Cmask=2 to count cycle.",
376 "BriefDescription": "Cycles with pending memory loads.",
380 "PublicDescription": "Cycles with pending memory loads. Set Cmask=2 to count cycle.",
389 …"PublicDescription": "This event counts cycles during which no instructions were executed in the e…
417 …"PublicDescription": "This event counts cycles during which no instructions were executed in the e…
422 "BriefDescription": "Stall cycles because IQ is full",
425 "PublicDescription": "Stall cycles due to IQ is full.",
433 …"PublicDescription": "This event counts cycles where the decoder is stalled on an instruction with…
472 …"BriefDescription": "Core cycles the allocator was stalled due to recovery from earlier clear even…
476 …"PublicDescription": "This event counts the number of cycles spent waiting for a recovery after an…
482 …"BriefDescription": "Core cycles the allocator was stalled due to recovery from earlier clear even…
486 …"PublicDescription": "Core cycles the allocator was stalled due to recovery from earlier clear eve…
531 "BriefDescription": "Cycles 4 Uops delivered by the LSD, but didn't come from the decoder.",
539 "BriefDescription": "Cycles Uops delivered by the LSD, but didn't come from the decoder.",
564 …"BriefDescription": "Cycles there was a Nuke. Account for both thread-specific and All Thread Nuke…
566 "EventName": "MACHINE_CLEARS.CYCLES",
610 "BriefDescription": "Resource-related stall cycles",
614 "PublicDescription": "Cycles allocation is stalled due to resource related reason.",
619 "BriefDescription": "Cycles stalled due to re-order buffer full.",
626 "BriefDescription": "Cycles stalled due to no eligible RS entry available.",
633 …"BriefDescription": "Cycles stalled due to no store buffers available. (not including draining for…
636 …"PublicDescription": "This event counts cycles during which no instructions were allocated because…
649 "BriefDescription": "Cycles when Reservation Station (RS) is empty for the thread",
652 …cycles when the Reservation Station ( RS ) is empty for the thread. The RS is a structure that buf…
667 "BriefDescription": "Cycles per thread when uops are executed in port 0.",
674 "BriefDescription": "Cycles per thread when uops are executed in port 1.",
681 "BriefDescription": "Cycles per thread when uops are executed in port 2.",
688 "BriefDescription": "Cycles per thread when uops are executed in port 3.",
695 "BriefDescription": "Cycles per thread when uops are executed in port 4.",
702 "BriefDescription": "Cycles per thread when uops are executed in port 5.",
709 "BriefDescription": "Cycles per thread when uops are executed in port 6.",
716 "BriefDescription": "Cycles per thread when uops are executed in port 7.",
732 … "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
741 … "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
750 … "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
759 … "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
768 "BriefDescription": "Cycles with no micro-ops executed from any thread on physical core.",
777 "BriefDescription": "Cycles where at least 1 uop was executed per-thread",
782 …"PublicDescription": "This events counts the cycles where at least one uop was executed. It is cou…
787 "BriefDescription": "Cycles where at least 2 uops were executed per-thread",
792 …"PublicDescription": "This events counts the cycles where at least two uop were executed. It is co…
797 "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
802 …"PublicDescription": "This events counts the cycles where at least three uop were executed. It is …
807 "BriefDescription": "Cycles where at least 4 uops were executed per-thread.",
816 …"BriefDescription": "Counts number of cycles no uops were dispatched to be executed on this thread…
826 "BriefDescription": "Cycles per thread when uops are executed in port 0",
829 "PublicDescription": "Cycles which a uop is dispatched on port 0 in this thread.",
835 "BriefDescription": "Cycles per core when uops are executed in port 0.",
842 "BriefDescription": "Cycles per thread when uops are executed in port 1",
845 "PublicDescription": "Cycles which a uop is dispatched on port 1 in this thread.",
851 "BriefDescription": "Cycles per core when uops are executed in port 1.",
858 "BriefDescription": "Cycles per thread when uops are executed in port 2",
861 "PublicDescription": "Cycles which a uop is dispatched on port 2 in this thread.",
867 "BriefDescription": "Cycles per core when uops are dispatched to port 2.",
874 "BriefDescription": "Cycles per thread when uops are executed in port 3",
877 "PublicDescription": "Cycles which a uop is dispatched on port 3 in this thread.",
883 "BriefDescription": "Cycles per core when uops are dispatched to port 3.",
890 "BriefDescription": "Cycles per thread when uops are executed in port 4",
893 "PublicDescription": "Cycles which a uop is dispatched on port 4 in this thread.",
899 "BriefDescription": "Cycles per core when uops are executed in port 4.",
906 "BriefDescription": "Cycles per thread when uops are executed in port 5",
909 "PublicDescription": "Cycles which a uop is dispatched on port 5 in this thread.",
915 "BriefDescription": "Cycles per core when uops are executed in port 5.",
922 "BriefDescription": "Cycles per thread when uops are executed in port 6",
925 "PublicDescription": "Cycles which a uop is dispatched on port 6 in this thread.",
931 "BriefDescription": "Cycles per core when uops are executed in port 6.",
938 "BriefDescription": "Cycles per thread when uops are executed in port 7",
941 "PublicDescription": "Cycles which a uop is dispatched on port 7 in this thread.",
947 "BriefDescription": "Cycles per core when uops are dispatched to port 7.",
963 …"BriefDescription": "Cycles when Resource Allocation Table (RAT) does not issue Uops to Reservatio…
996 …"BriefDescription": "Cycles when Resource Allocation Table (RAT) does not issue Uops to Reservatio…
1009 …the number of micro-ops retired. Use Cmask=1 and invert to count active cycles or stalled cycles.",
1015 "BriefDescription": "Cycles without actually retired uops.",
1033 "BriefDescription": "Cycles without actually retired uops.",
1042 "BriefDescription": "Cycles with less than 10 actually retired uops.",