Lines Matching +full:tx1 +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
33 * I don't have another implementation to compare from the Rockchip sources. Hard-coding for now.
42 snd_soc_component_write(component, RK817_CODEC_DDAC_POPD_DACST, 0x02); in rk817_init()
43 snd_soc_component_write(component, RK817_CODEC_DDAC_SR_LMT0, 0x02); in rk817_init()
44 snd_soc_component_write(component, RK817_CODEC_DADC_SR_ACL0, 0x02); in rk817_init()
45 snd_soc_component_write(component, RK817_CODEC_DTOP_VUCTIME, 0xf4); in rk817_init()
46 if (rk817->mic_in_differential) { in rk817_init()
51 return 0; in rk817_init()
59 snd_soc_component_write(component, RK817_CODEC_APLL_CFG1, 0x58); in rk817_set_component_pll()
61 snd_soc_component_write(component, RK817_CODEC_APLL_CFG2, 0x2d); in rk817_set_component_pll()
62 /* Set the PLL pre-divide value (values not documented). */ in rk817_set_component_pll()
63 snd_soc_component_write(component, RK817_CODEC_APLL_CFG3, 0x0c); in rk817_set_component_pll()
67 snd_soc_component_write(component, RK817_CODEC_APLL_CFG4, 0xa5); in rk817_set_component_pll()
69 return 0; in rk817_set_component_pll()
74 * 0db~-95db, 0.375db/step, for example:
75 * 0x00: 0dB
76 * 0xff: -95dB
79 static const DECLARE_TLV_DB_MINMAX(rk817_vol_tlv, -9500, 0);
83 * 27db~-18db, 3db/step, for example:
84 * 0x0: -18dB
85 * 0xf: 27dB
88 static const DECLARE_TLV_DB_MINMAX(rk817_gain_tlv, -1800, 2700);
92 RK817_CODEC_DDAC_VOLR, 0, 0x00, 0xff, 1, rk817_vol_tlv),
94 RK817_CODEC_DADC_VOLR, 0, 0x00, 0xff, 1, rk817_vol_tlv),
95 SOC_DOUBLE_TLV("Mic Capture Gain", RK817_CODEC_DMIC_PGA_GAIN, 4, 0, 0xf, 0,
116 SND_SOC_DAPM_SUPPLY("LDO Regulator", RK817_CODEC_AREF_RTCFG1, 6, 0, NULL, 0),
117 SND_SOC_DAPM_SUPPLY("IBIAS Block", RK817_CODEC_AREF_RTCFG1, 2, 1, NULL, 0),
118 SND_SOC_DAPM_SUPPLY("VAvg Buffer", RK817_CODEC_AREF_RTCFG1, 1, 1, NULL, 0),
119 SND_SOC_DAPM_SUPPLY("PLL Power", RK817_CODEC_APLL_CFG5, 0, 1, NULL, 0),
120 SND_SOC_DAPM_SUPPLY("I2S TX1 Transfer Start", RK817_CODEC_DI2S_RXCMD_TSD, 5, 0, NULL, 0),
123 SND_SOC_DAPM_SUPPLY("ADC Clock", RK817_CODEC_DTOP_DIGEN_CLKE, 7, 0, NULL, 0),
124 SND_SOC_DAPM_SUPPLY("I2S TX Clock", RK817_CODEC_DTOP_DIGEN_CLKE, 6, 0, NULL, 0),
125 SND_SOC_DAPM_SUPPLY("ADC Channel Enable", RK817_CODEC_DTOP_DIGEN_CLKE, 5, 0, NULL, 0),
126 SND_SOC_DAPM_SUPPLY("I2S TX Channel Enable", RK817_CODEC_DTOP_DIGEN_CLKE, 4, 0, NULL, 0),
127 SND_SOC_DAPM_SUPPLY("MIC Power On", RK817_CODEC_AMIC_CFG0, 6, 1, NULL, 0),
128 SND_SOC_DAPM_SUPPLY("I2S TX3 Transfer Start", RK817_CODEC_DI2S_TXCR3_TXCMD, 7, 0, NULL, 0),
129 SND_SOC_DAPM_SUPPLY("I2S TX3 Right Justified", RK817_CODEC_DI2S_TXCR3_TXCMD, 3, 0, NULL, 0),
133 SND_SOC_DAPM_SUPPLY("PGA L Power On", RK817_CODEC_AMIC_CFG0, 5, 1, NULL, 0),
134 SND_SOC_DAPM_SUPPLY("Mic Boost L1", RK817_CODEC_AMIC_CFG0, 3, 0, NULL, 0),
135 SND_SOC_DAPM_SUPPLY("Mic Boost L2", RK817_CODEC_AMIC_CFG0, 2, 0, NULL, 0),
139 SND_SOC_DAPM_SUPPLY("PGA R Power On", RK817_CODEC_AMIC_CFG0, 4, 1, NULL, 0),
140 SND_SOC_DAPM_SUPPLY("Mic Boost R1", RK817_CODEC_AMIC_CFG0, 3, 0, NULL, 0),
141 SND_SOC_DAPM_SUPPLY("Mic Boost R2", RK817_CODEC_AMIC_CFG0, 3, 0, NULL, 0),
144 SND_SOC_DAPM_SUPPLY("DAC Clock", RK817_CODEC_DTOP_DIGEN_CLKE, 3, 0, NULL, 0),
145 SND_SOC_DAPM_SUPPLY("I2S RX Clock", RK817_CODEC_DTOP_DIGEN_CLKE, 2, 0, NULL, 0),
146 SND_SOC_DAPM_SUPPLY("DAC Channel Enable", RK817_CODEC_DTOP_DIGEN_CLKE, 1, 0, NULL, 0),
147 SND_SOC_DAPM_SUPPLY("I2S RX Channel Enable", RK817_CODEC_DTOP_DIGEN_CLKE, 0, 0, NULL, 0),
148 SND_SOC_DAPM_SUPPLY("DAC Bias", RK817_CODEC_ADAC_CFG1, 3, 1, NULL, 0),
149 SND_SOC_DAPM_SUPPLY("DAC Mute Off", RK817_CODEC_DDAC_MUTE_MIXCTL, 0, 1, NULL, 0),
152 SND_SOC_DAPM_SUPPLY("Class D Mode", RK817_CODEC_DDAC_MUTE_MIXCTL, 4, 0, NULL, 0),
153 SND_SOC_DAPM_SUPPLY("High Pass Filter", RK817_CODEC_DDAC_MUTE_MIXCTL, 7, 0, NULL, 0),
155 SND_SOC_DAPM_SUPPLY("Enable Class D", RK817_CODEC_ACLASSD_CFG1, 7, 0, NULL, 0),
156 SND_SOC_DAPM_SUPPLY("Disable Class D Mute Ramp", RK817_CODEC_ACLASSD_CFG1, 6, 1, NULL, 0),
157 SND_SOC_DAPM_SUPPLY("Class D Mute Rate 1", RK817_CODEC_ACLASSD_CFG1, 3, 0, NULL, 0),
158 SND_SOC_DAPM_SUPPLY("Class D Mute Rate 2", RK817_CODEC_ACLASSD_CFG1, 2, 1, NULL, 0),
159 SND_SOC_DAPM_SUPPLY("Class D OCPP 2", RK817_CODEC_ACLASSD_CFG2, 5, 0, NULL, 0),
160 SND_SOC_DAPM_SUPPLY("Class D OCPP 3", RK817_CODEC_ACLASSD_CFG2, 4, 0, NULL, 0),
161 SND_SOC_DAPM_SUPPLY("Class D OCPN 2", RK817_CODEC_ACLASSD_CFG2, 1, 0, NULL, 0),
162 SND_SOC_DAPM_SUPPLY("Class D OCPN 3", RK817_CODEC_ACLASSD_CFG2, 0, 0, NULL, 0),
165 SND_SOC_DAPM_SUPPLY("Headphone Charge Pump", RK817_CODEC_AHP_CP, 4, 0, NULL, 0),
166 SND_SOC_DAPM_SUPPLY("Headphone CP Discharge LDO", RK817_CODEC_AHP_CP, 3, 1, NULL, 0),
167 SND_SOC_DAPM_SUPPLY("Headphone OStage", RK817_CODEC_AHP_CFG0, 6, 1, NULL, 0),
168 SND_SOC_DAPM_SUPPLY("Headphone Pre Amp", RK817_CODEC_AHP_CFG0, 5, 1, NULL, 0),
170 SND_SOC_DAPM_DAC("DAC R", "Playback", RK817_CODEC_ADAC_CFG1, 0, 1),
173 SND_SOC_DAPM_MUX("Playback Mux", SND_SOC_NOPM, 1, 0, &dac_mux),
195 {"ADC L", NULL, "I2S TX1 Transfer Start"},
213 {"ADC R", NULL, "I2S TX1 Transfer Start"},
228 {"SPK DAC", NULL, "I2S TX1 Transfer Start"},
251 {"DAC L", NULL, "I2S TX1 Transfer Start"},
268 {"DAC R", NULL, "I2S TX1 Transfer Start"},
292 struct snd_soc_component *component = codec_dai->component; in rk817_set_dai_sysclk()
295 rk817->stereo_sysclk = freq; in rk817_set_dai_sysclk()
297 return 0; in rk817_set_dai_sysclk()
303 struct snd_soc_component *component = codec_dai->component; in rk817_set_dai_fmt()
304 unsigned int i2s_mst = 0; in rk817_set_dai_fmt()
314 dev_err(component->dev, "%s : set master mask failed!\n", __func__); in rk817_set_dai_fmt()
315 return -EINVAL; in rk817_set_dai_fmt()
321 return 0; in rk817_set_dai_fmt()
328 struct snd_soc_component *component = dai->component; in rk817_hw_params()
345 return -EINVAL; in rk817_hw_params()
348 return 0; in rk817_hw_params()
353 struct snd_soc_component *component = dai->component; in rk817_digital_mute()
364 return 0; in rk817_digital_mute()
396 .name = "rk817-hifi",
418 struct rk808 *rk808 = dev_get_drvdata(component->dev->parent); in rk817_probe()
420 snd_soc_component_init_regmap(component, rk808->regmap); in rk817_probe()
421 rk817->component = component; in rk817_probe()
423 snd_soc_component_write(component, RK817_CODEC_DTOP_LPT_SRST, 0x40); in rk817_probe()
427 /* setting initial pll values so that we can continue to leverage simple-audio-card. in rk817_probe()
431 snd_soc_component_set_pll(component, 0, 0, 0, 0); in rk817_probe()
433 return 0; in rk817_probe()
461 node = of_get_child_by_name(dev->parent->of_node, "codec"); in rk817_codec_parse_dt_property()
467 rk817->mic_in_differential = in rk817_codec_parse_dt_property()
468 of_property_read_bool(node, "rockchip,mic-in-differential"); in rk817_codec_parse_dt_property()
475 struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent); in rk817_platform_probe()
479 rk817_codec_data = devm_kzalloc(&pdev->dev, in rk817_platform_probe()
483 return -ENOMEM; in rk817_platform_probe()
487 rk817_codec_data->rk808 = rk808; in rk817_platform_probe()
489 rk817_codec_parse_dt_property(&pdev->dev, rk817_codec_data); in rk817_platform_probe()
491 rk817_codec_data->mclk = devm_clk_get(pdev->dev.parent, "mclk"); in rk817_platform_probe()
492 if (IS_ERR(rk817_codec_data->mclk)) { in rk817_platform_probe()
493 dev_dbg(&pdev->dev, "Unable to get mclk\n"); in rk817_platform_probe()
494 ret = -ENXIO; in rk817_platform_probe()
498 ret = clk_prepare_enable(rk817_codec_data->mclk); in rk817_platform_probe()
499 if (ret < 0) { in rk817_platform_probe()
500 dev_err(&pdev->dev, "%s() clock prepare error %d\n", in rk817_platform_probe()
505 ret = devm_snd_soc_register_component(&pdev->dev, &soc_codec_dev_rk817, in rk817_platform_probe()
507 if (ret < 0) { in rk817_platform_probe()
508 dev_err(&pdev->dev, "%s() register codec error %d\n", in rk817_platform_probe()
513 return 0; in rk817_platform_probe()
516 clk_disable_unprepare(rk817_codec_data->mclk); in rk817_platform_probe()
525 clk_disable_unprepare(rk817->mclk); in rk817_platform_remove()
530 .name = "rk817-codec",
539 MODULE_AUTHOR("binyuan <kevan.lan@rock-chips.com>");
541 MODULE_ALIAS("platform:rk817-codec");