Lines Matching full:dmic

743 	unsigned int val, dmic;  in tx_macro_put_dec_enum()  local
783 if (widget->shift) { /* MSM DMIC */ in tx_macro_put_dec_enum()
792 dmic = TX_ADC_TO_DMIC(val); in tx_macro_put_dec_enum()
793 dmic_clk_reg = CDC_TX_TOP_CSR_SWR_DMICn_CTL(dmic); in tx_macro_put_dec_enum()
862 u16 adc_mux_reg, adc_reg, adc_n, dmic; in tx_macro_enable_dec() local
880 dmic = TX_ADC_TO_DMIC(adc_n); in tx_macro_enable_dec()
881 dmic_clk_reg = CDC_TX_TOP_CSR_SWR_DMICn_CTL(dmic); in tx_macro_enable_dec()
1439 SND_SOC_DAPM_MUX("TX DMIC MUX0", SND_SOC_NOPM, 4, 0, &tx_dmic0_mux),
1440 SND_SOC_DAPM_MUX("TX DMIC MUX1", SND_SOC_NOPM, 4, 0, &tx_dmic1_mux),
1441 SND_SOC_DAPM_MUX("TX DMIC MUX2", SND_SOC_NOPM, 4, 0, &tx_dmic2_mux),
1442 SND_SOC_DAPM_MUX("TX DMIC MUX3", SND_SOC_NOPM, 4, 0, &tx_dmic3_mux),
1443 SND_SOC_DAPM_MUX("TX DMIC MUX4", SND_SOC_NOPM, 4, 0, &tx_dmic4_mux),
1444 SND_SOC_DAPM_MUX("TX DMIC MUX5", SND_SOC_NOPM, 4, 0, &tx_dmic5_mux),
1445 SND_SOC_DAPM_MUX("TX DMIC MUX6", SND_SOC_NOPM, 4, 0, &tx_dmic6_mux),
1446 SND_SOC_DAPM_MUX("TX DMIC MUX7", SND_SOC_NOPM, 4, 0, &tx_dmic7_mux),
1571 {"TX DEC0 MUX", "MSM_DMIC", "TX DMIC MUX0"},
1572 {"TX DMIC MUX0", "DMIC0", "TX DMIC0"},
1573 {"TX DMIC MUX0", "DMIC1", "TX DMIC1"},
1574 {"TX DMIC MUX0", "DMIC2", "TX DMIC2"},
1575 {"TX DMIC MUX0", "DMIC3", "TX DMIC3"},
1576 {"TX DMIC MUX0", "DMIC4", "TX DMIC4"},
1577 {"TX DMIC MUX0", "DMIC5", "TX DMIC5"},
1578 {"TX DMIC MUX0", "DMIC6", "TX DMIC6"},
1579 {"TX DMIC MUX0", "DMIC7", "TX DMIC7"},
1596 {"TX DEC1 MUX", "MSM_DMIC", "TX DMIC MUX1"},
1597 {"TX DMIC MUX1", "DMIC0", "TX DMIC0"},
1598 {"TX DMIC MUX1", "DMIC1", "TX DMIC1"},
1599 {"TX DMIC MUX1", "DMIC2", "TX DMIC2"},
1600 {"TX DMIC MUX1", "DMIC3", "TX DMIC3"},
1601 {"TX DMIC MUX1", "DMIC4", "TX DMIC4"},
1602 {"TX DMIC MUX1", "DMIC5", "TX DMIC5"},
1603 {"TX DMIC MUX1", "DMIC6", "TX DMIC6"},
1604 {"TX DMIC MUX1", "DMIC7", "TX DMIC7"},
1621 {"TX DEC2 MUX", "MSM_DMIC", "TX DMIC MUX2"},
1622 {"TX DMIC MUX2", "DMIC0", "TX DMIC0"},
1623 {"TX DMIC MUX2", "DMIC1", "TX DMIC1"},
1624 {"TX DMIC MUX2", "DMIC2", "TX DMIC2"},
1625 {"TX DMIC MUX2", "DMIC3", "TX DMIC3"},
1626 {"TX DMIC MUX2", "DMIC4", "TX DMIC4"},
1627 {"TX DMIC MUX2", "DMIC5", "TX DMIC5"},
1628 {"TX DMIC MUX2", "DMIC6", "TX DMIC6"},
1629 {"TX DMIC MUX2", "DMIC7", "TX DMIC7"},
1646 {"TX DEC3 MUX", "MSM_DMIC", "TX DMIC MUX3"},
1647 {"TX DMIC MUX3", "DMIC0", "TX DMIC0"},
1648 {"TX DMIC MUX3", "DMIC1", "TX DMIC1"},
1649 {"TX DMIC MUX3", "DMIC2", "TX DMIC2"},
1650 {"TX DMIC MUX3", "DMIC3", "TX DMIC3"},
1651 {"TX DMIC MUX3", "DMIC4", "TX DMIC4"},
1652 {"TX DMIC MUX3", "DMIC5", "TX DMIC5"},
1653 {"TX DMIC MUX3", "DMIC6", "TX DMIC6"},
1654 {"TX DMIC MUX3", "DMIC7", "TX DMIC7"},
1671 {"TX DEC4 MUX", "MSM_DMIC", "TX DMIC MUX4"},
1672 {"TX DMIC MUX4", "DMIC0", "TX DMIC0"},
1673 {"TX DMIC MUX4", "DMIC1", "TX DMIC1"},
1674 {"TX DMIC MUX4", "DMIC2", "TX DMIC2"},
1675 {"TX DMIC MUX4", "DMIC3", "TX DMIC3"},
1676 {"TX DMIC MUX4", "DMIC4", "TX DMIC4"},
1677 {"TX DMIC MUX4", "DMIC5", "TX DMIC5"},
1678 {"TX DMIC MUX4", "DMIC6", "TX DMIC6"},
1679 {"TX DMIC MUX4", "DMIC7", "TX DMIC7"},
1696 {"TX DEC5 MUX", "MSM_DMIC", "TX DMIC MUX5"},
1697 {"TX DMIC MUX5", "DMIC0", "TX DMIC0"},
1698 {"TX DMIC MUX5", "DMIC1", "TX DMIC1"},
1699 {"TX DMIC MUX5", "DMIC2", "TX DMIC2"},
1700 {"TX DMIC MUX5", "DMIC3", "TX DMIC3"},
1701 {"TX DMIC MUX5", "DMIC4", "TX DMIC4"},
1702 {"TX DMIC MUX5", "DMIC5", "TX DMIC5"},
1703 {"TX DMIC MUX5", "DMIC6", "TX DMIC6"},
1704 {"TX DMIC MUX5", "DMIC7", "TX DMIC7"},
1721 {"TX DEC6 MUX", "MSM_DMIC", "TX DMIC MUX6"},
1722 {"TX DMIC MUX6", "DMIC0", "TX DMIC0"},
1723 {"TX DMIC MUX6", "DMIC1", "TX DMIC1"},
1724 {"TX DMIC MUX6", "DMIC2", "TX DMIC2"},
1725 {"TX DMIC MUX6", "DMIC3", "TX DMIC3"},
1726 {"TX DMIC MUX6", "DMIC4", "TX DMIC4"},
1727 {"TX DMIC MUX6", "DMIC5", "TX DMIC5"},
1728 {"TX DMIC MUX6", "DMIC6", "TX DMIC6"},
1729 {"TX DMIC MUX6", "DMIC7", "TX DMIC7"},
1746 {"TX DEC7 MUX", "MSM_DMIC", "TX DMIC MUX7"},
1747 {"TX DMIC MUX7", "DMIC0", "TX DMIC0"},
1748 {"TX DMIC MUX7", "DMIC1", "TX DMIC1"},
1749 {"TX DMIC MUX7", "DMIC2", "TX DMIC2"},
1750 {"TX DMIC MUX7", "DMIC3", "TX DMIC3"},
1751 {"TX DMIC MUX7", "DMIC4", "TX DMIC4"},
1752 {"TX DMIC MUX7", "DMIC5", "TX DMIC5"},
1753 {"TX DMIC MUX7", "DMIC6", "TX DMIC6"},
1754 {"TX DMIC MUX7", "DMIC7", "TX DMIC7"},