Lines Matching +full:spk +full:- +full:shutdown
1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2022-2023 Cirrus Logic, Inc. and
15 #include <linux/mfd/cs42l43-regs.h>
22 #include <sound/soc-component.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/soc-dai.h>
126 dev_err(priv->dev, "Error " #name " IRQ\n"); \
147 dev_dbg(priv->dev, #name " completed\n"); \ in CS42L43_IRQ_ERROR()
148 complete(&priv->name); \ in CS42L43_IRQ_ERROR()
173 dev_dbg(priv->dev, "Microphone shutter changed\n");
175 if (!priv->component)
179 ret = snd_soc_component_notify_control(priv->component,
193 dev_dbg(priv->dev, "Speaker shutter changed\n"); in cs42l43_spk_shutter()
195 if (!priv->component) in cs42l43_spk_shutter()
198 ret = snd_soc_component_notify_control(priv->component, in cs42l43_spk_shutter()
220 struct snd_soc_component *component = dai->component; in cs42l43_startup()
222 struct cs42l43 *cs42l43 = priv->core; in cs42l43_startup()
223 int provider = !dai->id || !!regmap_test_bits(cs42l43->regmap, in cs42l43_startup()
228 priv->constraint.mask = CS42L43_PROVIDER_RATE_MASK; in cs42l43_startup()
230 priv->constraint.mask = CS42L43_CONSUMER_RATE_MASK; in cs42l43_startup()
232 return snd_pcm_hw_constraint_list(substream->runtime, 0, in cs42l43_startup()
234 &priv->constraint); in cs42l43_startup()
257 return -EINVAL; in cs42l43_convert_sample_rate()
265 struct cs42l43_codec *priv = snd_soc_component_get_drvdata(dai->component); in cs42l43_set_sample_rate()
266 struct cs42l43 *cs42l43 = priv->core; in cs42l43_set_sample_rate()
271 dev_err(priv->dev, "Failed to convert sample rate: %d\n", ret); in cs42l43_set_sample_rate()
276 regmap_update_bits(cs42l43->regmap, CS42L43_SAMPLE_RATE1, in cs42l43_set_sample_rate()
286 struct cs42l43_codec *priv = snd_soc_component_get_drvdata(dai->component); in cs42l43_asp_hw_params()
287 struct cs42l43 *cs42l43 = priv->core; in cs42l43_asp_hw_params()
288 int dsp_mode = !!regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CTRL, in cs42l43_asp_hw_params()
290 int provider = !!regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2, in cs42l43_asp_hw_params()
300 if (priv->n_slots) { in cs42l43_asp_hw_params()
301 n_slots = priv->n_slots; in cs42l43_asp_hw_params()
302 slot_width = priv->slot_width; in cs42l43_asp_hw_params()
306 dev_dbg(priv->dev, "Forcing balanced channels on ASP\n"); in cs42l43_asp_hw_params()
320 dev_err(priv->dev, "Can't produce %dHz bclk\n", bclk_target); in cs42l43_asp_hw_params()
321 return -EINVAL; in cs42l43_asp_hw_params()
324 dev_dbg(priv->dev, "bclk %d/%d = %dHz, with %dx%d frame\n", in cs42l43_asp_hw_params()
327 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG1, in cs42l43_asp_hw_params()
331 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_FSYNC_CTRL1, in cs42l43_asp_hw_params()
335 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_FSYNC_CTRL4, in cs42l43_asp_hw_params()
339 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { in cs42l43_asp_hw_params()
341 slots = priv->tx_slots; in cs42l43_asp_hw_params()
344 slots = priv->rx_slots; in cs42l43_asp_hw_params()
356 dev_dbg(priv->dev, "Configure channel %d at slot %d (%d,%d)\n", in cs42l43_asp_hw_params()
359 regmap_update_bits(cs42l43->regmap, reg, in cs42l43_asp_hw_params()
363 ((data_width - 1) << CS42L43_ASP_CH_WIDTH_SHIFT) | in cs42l43_asp_hw_params()
373 struct snd_soc_component *component = dai->component; in cs42l43_asp_set_fmt()
376 struct cs42l43 *cs42l43 = priv->core; in cs42l43_asp_set_fmt()
377 int provider = regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2, in cs42l43_asp_set_fmt()
402 dev_err(priv->dev, "Unsupported DAI format 0x%x\n", in cs42l43_asp_set_fmt()
404 return -EINVAL; in cs42l43_asp_set_fmt()
418 dev_err(priv->dev, "Unsupported ASP mode 0x%x\n", in cs42l43_asp_set_fmt()
420 return -EINVAL; in cs42l43_asp_set_fmt()
439 dev_err(priv->dev, "Unsupported invert mode 0x%x\n", in cs42l43_asp_set_fmt()
441 return -EINVAL; in cs42l43_asp_set_fmt()
444 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_CTRL, in cs42l43_asp_set_fmt()
447 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_DATA_CTRL, in cs42l43_asp_set_fmt()
451 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2, in cs42l43_asp_set_fmt()
455 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_FSYNC_CTRL3, in cs42l43_asp_set_fmt()
468 int slot = ffs(mask) - 1; in cs42l43_mask_to_slots()
479 dev_warn(priv->dev, "Too many channels in TDM mask\n"); in cs42l43_mask_to_slots()
485 struct snd_soc_component *component = dai->component; in cs42l43_asp_set_tdm_slot()
488 priv->n_slots = slots; in cs42l43_asp_set_tdm_slot()
489 priv->slot_width = slot_width; in cs42l43_asp_set_tdm_slot()
496 cs42l43_mask_to_slots(priv, tx_mask, priv->tx_slots); in cs42l43_asp_set_tdm_slot()
497 cs42l43_mask_to_slots(priv, rx_mask, priv->rx_slots); in cs42l43_asp_set_tdm_slot()
535 .name = "cs42l43-asp",
554 .name = "cs42l43-dp1",
566 .name = "cs42l43-dp2",
578 .name = "cs42l43-dp3",
590 .name = "cs42l43-dp4",
602 .name = "cs42l43-dp5",
614 .name = "cs42l43-dp6",
626 .name = "cs42l43-dp7",
639 static const DECLARE_TLV_DB_SCALE(cs42l43_mixer_tlv, -3200, 100, 0);
674 static DECLARE_TLV_DB_SCALE(cs42l43_adc_tlv, -600, 600, 0);
675 static DECLARE_TLV_DB_SCALE(cs42l43_dec_tlv, -6400, 50, 0);
720 static DECLARE_TLV_DB_SCALE(cs42l43_speaker_tlv, -6400, 50, 0);
728 static DECLARE_TLV_DB_SCALE(cs42l43_headphone_tlv, -11450, 50, 1);
889 memcpy(ucontrol->value.integer.value, priv->eq_coeffs, sizeof(priv->eq_coeffs)); in cs42l43_eq_get()
903 memcpy(priv->eq_coeffs, ucontrol->value.integer.value, sizeof(priv->eq_coeffs)); in cs42l43_eq_put()
912 struct cs42l43 *cs42l43 = priv->core; in cs42l43_spk_vu_sync()
914 mutex_lock(&priv->spk_vu_lock); in cs42l43_spk_vu_sync()
916 regmap_update_bits(cs42l43->regmap, CS42L43_INTP_VOLUME_CTRL1, in cs42l43_spk_vu_sync()
918 regmap_update_bits(cs42l43->regmap, CS42L43_INTP_VOLUME_CTRL1, in cs42l43_spk_vu_sync()
921 mutex_unlock(&priv->spk_vu_lock); in cs42l43_spk_vu_sync()
926 struct cs42l43 *cs42l43 = priv->core; in cs42l43_shutter_get()
930 ret = pm_runtime_resume_and_get(priv->dev); in cs42l43_shutter_get()
932 dev_err(priv->dev, "Failed to resume for shutters: %d\n", ret); in cs42l43_shutter_get()
937 * SHUTTER_CONTROL is a mix of volatile and non-volatile bits, so must in cs42l43_shutter_get()
938 * be cached for the non-volatiles, so drop it from the cache here so in cs42l43_shutter_get()
941 ret = regcache_drop_region(cs42l43->regmap, CS42L43_SHUTTER_CONTROL, in cs42l43_shutter_get()
944 dev_err(priv->dev, "Failed to drop shutter from cache: %d\n", ret); in cs42l43_shutter_get()
948 ret = regmap_read(cs42l43->regmap, CS42L43_SHUTTER_CONTROL, &val); in cs42l43_shutter_get()
950 dev_err(priv->dev, "Failed to check shutter status: %d\n", ret); in cs42l43_shutter_get()
956 dev_dbg(priv->dev, "%s shutter is %s\n", in cs42l43_shutter_get()
961 pm_runtime_mark_last_busy(priv->dev); in cs42l43_shutter_get()
962 pm_runtime_put_autosuspend(priv->dev); in cs42l43_shutter_get()
978 ucontrol->value.integer.value[0] = ret; in cs42l43_decim_get()
996 ucontrol->value.integer.value[0] = ret; in cs42l43_spk_get()
1149 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_eq_ev()
1151 struct cs42l43 *cs42l43 = priv->core; in cs42l43_eq_ev()
1157 regmap_update_bits(cs42l43->regmap, CS42L43_MUTE_EQ_IN0, in cs42l43_eq_ev()
1161 regmap_update_bits(cs42l43->regmap, CS42L43_COEFF_RD_WR0, in cs42l43_eq_ev()
1165 regmap_write(cs42l43->regmap, CS42L43_COEFF_DATA_IN0, in cs42l43_eq_ev()
1166 priv->eq_coeffs[i]); in cs42l43_eq_ev()
1168 regmap_update_bits(cs42l43->regmap, CS42L43_COEFF_RD_WR0, in cs42l43_eq_ev()
1173 ret = regmap_read_poll_timeout(cs42l43->regmap, CS42L43_INIT_DONE0, in cs42l43_eq_ev()
1177 dev_err(priv->dev, "Failed to start EQs: %d\n", ret); in cs42l43_eq_ev()
1179 regmap_update_bits(cs42l43->regmap, CS42L43_MUTE_EQ_IN0, in cs42l43_eq_ev()
1204 struct cs42l43 *cs42l43 = priv->core; in cs42l43_set_pll()
1206 lockdep_assert_held(&cs42l43->pll_lock); in cs42l43_set_pll()
1208 if (priv->refclk_src == src && priv->refclk_freq == freq) in cs42l43_set_pll()
1211 if (regmap_test_bits(cs42l43->regmap, CS42L43_CTRL_REG, CS42L43_PLL_EN_MASK)) { in cs42l43_set_pll()
1212 dev_err(priv->dev, "PLL active, can't change configuration\n"); in cs42l43_set_pll()
1213 return -EBUSY; in cs42l43_set_pll()
1219 dev_dbg(priv->dev, "Source PLL from %s at %uHz\n", in cs42l43_set_pll()
1222 priv->refclk_src = src; in cs42l43_set_pll()
1223 priv->refclk_freq = freq; in cs42l43_set_pll()
1227 dev_err(priv->dev, "Invalid PLL source: 0x%x\n", src); in cs42l43_set_pll()
1228 return -EINVAL; in cs42l43_set_pll()
1238 struct cs42l43 *cs42l43 = priv->core; in cs42l43_enable_pll()
1241 unsigned int freq = priv->refclk_freq; in cs42l43_enable_pll()
1244 lockdep_assert_held(&cs42l43->pll_lock); in cs42l43_enable_pll()
1246 if (priv->refclk_src == CS42L43_SYSCLK_SDW) { in cs42l43_enable_pll()
1248 freq = cs42l43->sdw_freq; in cs42l43_enable_pll()
1249 else if (!cs42l43->sdw_freq) in cs42l43_enable_pll()
1250 cs42l43->sdw_freq = freq; in cs42l43_enable_pll()
1253 dev_dbg(priv->dev, "Enabling PLL at %uHz\n", freq); in cs42l43_enable_pll()
1255 while (freq > cs42l43_pll_configs[ARRAY_SIZE(cs42l43_pll_configs) - 1].freq) { in cs42l43_enable_pll()
1272 dev_err(priv->dev, "No suitable PLL config: 0x%x, %uHz\n", div, freq); in cs42l43_enable_pll()
1273 return -EINVAL; in cs42l43_enable_pll()
1276 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL, in cs42l43_enable_pll()
1279 priv->refclk_src << CS42L43_PLL_REFCLK_SRC_SHIFT); in cs42l43_enable_pll()
1280 regmap_write(cs42l43->regmap, CS42L43_FDIV_FRAC, config->div); in cs42l43_enable_pll()
1281 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG, in cs42l43_enable_pll()
1284 config->mode << CS42L43_PLL_MODE_BYPASS_1029_SHIFT); in cs42l43_enable_pll()
1285 regmap_update_bits(cs42l43->regmap, CS42L43_CAL_RATIO, in cs42l43_enable_pll()
1286 CS42L43_PLL_CAL_RATIO_MASK, config->cal); in cs42l43_enable_pll()
1287 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL, in cs42l43_enable_pll()
1290 reinit_completion(&priv->pll_ready); in cs42l43_enable_pll()
1292 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG, in cs42l43_enable_pll()
1295 time_left = wait_for_completion_timeout(&priv->pll_ready, in cs42l43_enable_pll()
1298 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG, in cs42l43_enable_pll()
1300 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL, in cs42l43_enable_pll()
1303 dev_err(priv->dev, "Timeout out waiting for PLL\n"); in cs42l43_enable_pll()
1304 return -ETIMEDOUT; in cs42l43_enable_pll()
1307 if (priv->refclk_src == CS42L43_SYSCLK_SDW) in cs42l43_enable_pll()
1308 cs42l43->sdw_pll_active = true; in cs42l43_enable_pll()
1310 dev_dbg(priv->dev, "PLL locked in %ums\n", 200 - jiffies_to_msecs(time_left)); in cs42l43_enable_pll()
1317 regmap_multi_reg_write(cs42l43->regmap, enable_seq, ARRAY_SIZE(enable_seq)); in cs42l43_enable_pll()
1328 struct cs42l43 *cs42l43 = priv->core; in cs42l43_disable_pll()
1330 dev_dbg(priv->dev, "Disabling PLL\n"); in cs42l43_disable_pll()
1332 lockdep_assert_held(&cs42l43->pll_lock); in cs42l43_disable_pll()
1334 regmap_multi_reg_write(cs42l43->regmap, disable_seq, ARRAY_SIZE(disable_seq)); in cs42l43_disable_pll()
1335 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG, CS42L43_PLL_EN_MASK, 0); in cs42l43_disable_pll()
1336 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL, in cs42l43_disable_pll()
1339 cs42l43->sdw_pll_active = false; in cs42l43_disable_pll()
1347 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_pll_ev()
1349 struct cs42l43 *cs42l43 = priv->core; in cs42l43_pll_ev()
1352 mutex_lock(&cs42l43->pll_lock); in cs42l43_pll_ev()
1356 if (priv->refclk_src == CS42L43_SYSCLK_MCLK) { in cs42l43_pll_ev()
1357 ret = clk_prepare_enable(priv->mclk); in cs42l43_pll_ev()
1359 dev_err(priv->dev, "Failed to enable MCLK: %d\n", ret); in cs42l43_pll_ev()
1369 if (priv->refclk_src == CS42L43_SYSCLK_MCLK) in cs42l43_pll_ev()
1370 clk_disable_unprepare(priv->mclk); in cs42l43_pll_ev()
1377 mutex_unlock(&cs42l43->pll_lock); in cs42l43_pll_ev()
1405 return -ETIMEDOUT; in cs42l43_dapm_wait_completion()
1413 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_spkr_ev()
1416 return cs42l43_dapm_wait_completion(&priv->spkr_startup, in cs42l43_spkr_ev()
1417 &priv->spkr_shutdown, event, in cs42l43_spkr_ev()
1424 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_spkl_ev()
1427 return cs42l43_dapm_wait_completion(&priv->spkl_startup, in cs42l43_spkl_ev()
1428 &priv->spkl_shutdown, event, in cs42l43_spkl_ev()
1435 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_hp_ev()
1437 struct cs42l43 *cs42l43 = priv->core; in cs42l43_hp_ev()
1438 unsigned int mask = 1 << w->shift; in cs42l43_hp_ev()
1447 priv->hp_ena &= ~mask; in cs42l43_hp_ev()
1448 priv->hp_ena |= val; in cs42l43_hp_ev()
1450 ret = cs42l43_dapm_wait_completion(&priv->hp_startup, in cs42l43_hp_ev()
1451 &priv->hp_shutdown, event, in cs42l43_hp_ev()
1456 if (!priv->load_detect_running) in cs42l43_hp_ev()
1457 regmap_update_bits(cs42l43->regmap, CS42L43_BLOCK_EN8, in cs42l43_hp_ev()
1462 if (priv->load_detect_running) in cs42l43_hp_ev()
1465 ret = cs42l43_dapm_wait_completion(&priv->hp_startup, in cs42l43_hp_ev()
1466 &priv->hp_shutdown, event, in cs42l43_hp_ev()
1481 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_mic_ev()
1483 struct cs42l43 *cs42l43 = priv->core; in cs42l43_mic_ev()
1488 switch (w->shift) { in cs42l43_mic_ev()
1494 val = &priv->decim_cache[0]; in cs42l43_mic_ev()
1501 val = &priv->decim_cache[1]; in cs42l43_mic_ev()
1507 val = &priv->decim_cache[2]; in cs42l43_mic_ev()
1513 val = &priv->decim_cache[3]; in cs42l43_mic_ev()
1516 dev_err(priv->dev, "Invalid microphone shift: %d\n", w->shift); in cs42l43_mic_ev()
1517 return -EINVAL; in cs42l43_mic_ev()
1522 ret = regmap_read(cs42l43->regmap, reg, val); in cs42l43_mic_ev()
1524 dev_err(priv->dev, in cs42l43_mic_ev()
1530 regmap_update_bits(cs42l43->regmap, reg, mute | ramp, mute); in cs42l43_mic_ev()
1533 regmap_update_bits(cs42l43->regmap, reg, mute | ramp, *val); in cs42l43_mic_ev()
1545 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_adc_ev()
1547 struct cs42l43 *cs42l43 = priv->core; in cs42l43_adc_ev()
1548 unsigned int mask = 1 << w->shift; in cs42l43_adc_ev()
1561 priv->adc_ena &= ~mask; in cs42l43_adc_ev()
1562 priv->adc_ena |= val; in cs42l43_adc_ev()
1564 if (!priv->load_detect_running) in cs42l43_adc_ev()
1565 regmap_update_bits(cs42l43->regmap, CS42L43_BLOCK_EN3, in cs42l43_adc_ev()
1673 SND_SOC_DAPM_REGULATOR_SUPPLY("vdd-amp", 0, 0),
1909 { "AMP1", NULL, "vdd-amp" },
1910 { "AMP2", NULL, "vdd-amp" },
2001 struct cs42l43 *cs42l43 = priv->core; in cs42l43_set_sysclk()
2004 mutex_lock(&cs42l43->pll_lock); in cs42l43_set_sysclk()
2006 mutex_unlock(&cs42l43->pll_lock); in cs42l43_set_sysclk()
2014 struct cs42l43 *cs42l43 = priv->core; in cs42l43_component_probe()
2016 snd_soc_component_init_regmap(component, cs42l43->regmap); in cs42l43_component_probe()
2018 cs42l43_mask_to_slots(priv, CS42L43_DEFAULT_SLOTS, priv->tx_slots); in cs42l43_component_probe()
2019 cs42l43_mask_to_slots(priv, CS42L43_DEFAULT_SLOTS, priv->rx_slots); in cs42l43_component_probe()
2021 priv->component = component; in cs42l43_component_probe()
2022 priv->constraint = cs42l43_constraint; in cs42l43_component_probe()
2028 .name = "cs42l43-codec",
2054 { CS42L43_HP_SHUTDOWN_DONE, "hp shutdown", cs42l43_hp_shutdown },
2065 { CS42L43_AMP2_SHUTDOWN_DONE, "spkr shutdown", cs42l43_spkr_shutdown },
2066 { CS42L43_AMP1_SHUTDOWN_DONE, "spkl shutdown", cs42l43_spkl_shutdown },
2069 { CS42L43_AMP2_THERM_SHDN, "spkr thermal shutdown", cs42l43_spkr_therm_shutdown },
2070 { CS42L43_AMP1_THERM_SHDN, "spkl thermal shutdown", cs42l43_spkl_therm_shutdown },
2088 return dev_err_probe(priv->dev, ret, "Failed to map IRQ %s\n", name); in cs42l43_request_irq()
2090 dev_dbg(priv->dev, "Request IRQ %d for %s\n", ret, name); in cs42l43_request_irq()
2092 ret = devm_request_threaded_irq(priv->dev, ret, NULL, handler, in cs42l43_request_irq()
2095 return dev_err_probe(priv->dev, ret, "Failed to request IRQ %s\n", name); in cs42l43_request_irq()
2111 dev_warn(priv->dev, "Manual shutters, notifications not available\n"); in cs42l43_shutter_irq()
2138 struct cs42l43 *cs42l43 = dev_get_drvdata(pdev->dev.parent); in cs42l43_codec_probe()
2144 dom = irq_find_matching_fwnode(dev_fwnode(cs42l43->dev), DOMAIN_BUS_ANY); in cs42l43_codec_probe()
2146 return -EPROBE_DEFER; in cs42l43_codec_probe()
2148 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in cs42l43_codec_probe()
2150 return -ENOMEM; in cs42l43_codec_probe()
2152 priv->dev = &pdev->dev; in cs42l43_codec_probe()
2153 priv->core = cs42l43; in cs42l43_codec_probe()
2157 mutex_init(&priv->jack_lock); in cs42l43_codec_probe()
2158 mutex_init(&priv->spk_vu_lock); in cs42l43_codec_probe()
2160 init_completion(&priv->hp_startup); in cs42l43_codec_probe()
2161 init_completion(&priv->hp_shutdown); in cs42l43_codec_probe()
2162 init_completion(&priv->spkr_shutdown); in cs42l43_codec_probe()
2163 init_completion(&priv->spkl_shutdown); in cs42l43_codec_probe()
2164 init_completion(&priv->spkr_startup); in cs42l43_codec_probe()
2165 init_completion(&priv->spkl_startup); in cs42l43_codec_probe()
2166 init_completion(&priv->pll_ready); in cs42l43_codec_probe()
2167 init_completion(&priv->type_detect); in cs42l43_codec_probe()
2168 init_completion(&priv->load_detect); in cs42l43_codec_probe()
2170 INIT_DELAYED_WORK(&priv->tip_sense_work, cs42l43_tip_sense_work); in cs42l43_codec_probe()
2171 INIT_DELAYED_WORK(&priv->bias_sense_timeout, cs42l43_bias_sense_timeout); in cs42l43_codec_probe()
2172 INIT_DELAYED_WORK(&priv->button_press_work, cs42l43_button_press_work); in cs42l43_codec_probe()
2173 INIT_WORK(&priv->button_release_work, cs42l43_button_release_work); in cs42l43_codec_probe()
2175 pm_runtime_set_autosuspend_delay(priv->dev, 100); in cs42l43_codec_probe()
2176 pm_runtime_use_autosuspend(priv->dev); in cs42l43_codec_probe()
2177 pm_runtime_set_active(priv->dev); in cs42l43_codec_probe()
2178 pm_runtime_get_noresume(priv->dev); in cs42l43_codec_probe()
2180 ret = devm_pm_runtime_enable(priv->dev); in cs42l43_codec_probe()
2192 ret = regmap_read(cs42l43->regmap, CS42L43_SHUTTER_CONTROL, &val); in cs42l43_codec_probe()
2194 dev_err(priv->dev, "Failed to check shutter source: %d\n", ret); in cs42l43_codec_probe()
2206 "spk shutter open", "spk shutter close", in cs42l43_codec_probe()
2212 priv->mclk = clk_get_optional(cs42l43->dev, "mclk"); in cs42l43_codec_probe()
2213 if (IS_ERR(priv->mclk)) { in cs42l43_codec_probe()
2214 ret = PTR_ERR(priv->mclk); in cs42l43_codec_probe()
2215 dev_err_probe(priv->dev, ret, "Failed to get mclk\n"); in cs42l43_codec_probe()
2219 ret = devm_snd_soc_register_component(priv->dev, &cs42l43_component_drv, in cs42l43_codec_probe()
2222 dev_err_probe(priv->dev, ret, "Failed to register component\n"); in cs42l43_codec_probe()
2226 pm_runtime_mark_last_busy(priv->dev); in cs42l43_codec_probe()
2227 pm_runtime_put_autosuspend(priv->dev); in cs42l43_codec_probe()
2232 clk_put(priv->mclk); in cs42l43_codec_probe()
2234 pm_runtime_put_sync(priv->dev); in cs42l43_codec_probe()
2243 clk_put(priv->mclk); in cs42l43_codec_remove()
2252 dev_dbg(priv->dev, "Runtime resume\n"); in cs42l43_codec_runtime_resume()
2264 { "cs42l43-codec", },
2271 .name = "cs42l43-codec",